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44 articles for “semiconductor metal oxides”
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Design and Implementation of Low Power Area Effective 2×4 Decoder for SARM Applications Using 16 nm Technology.
Abstract: This project involves analysis of Modified Mixed Logic Design abbreviated as MMLD which includes following design logics: Complementary Metal Oxide Semiconductor abbreviated to CMOS logic design, Gate Diffusion Input abbreviated as GDI technique, and Dual Value Logic called as DVL. Two logic styles are used in this paper study to reduce power dissipation and delay time which are fourteen 14-transistor and fifteen 15-transistor decoders. Every situation requires the use of …
Published in Journal of Semiconductor Devices and Circuits · Vol. 10, Issue 1, 2024 · pp. 24–36 Read article
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Single Bit Low-Power High-Speed Full Adder
Abstract: This paper presents a high-speed low-power full adder cells that lead to have a reduced power-delay product (PDP). A comparison against other full-adder structure as having low PDP, in terms of speed, power consumption and area of cells is carried out. This paper contains, a hybrid 1-bit full adder design employing both complementary metal-oxide semiconductor (CMOS) and transmission gate logic styles. First implemented was the design for 1 bit then …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 55–60 Read article
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Review Paper To Design a Low Power CNTFET Based XOR Gate
Abstract: The continuous scaling down of Silicon technology leads to various critical challenges and reliability issues such as short channel effect, high leakage current, interconnect problems, etc. CNTFET is the most probable substitutes to traditional MOSFET. The CNTFET device based circuits portray advantages with its better control over the device channel, reduced leakage current, reduced short channel effects. The CNTFET based XOR gate circuits incur the minimum power and energy dissipation. …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 1, 2018 · pp. 48–53 Read article
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Power-delay Product Optimal Design of Sequential Circuits Using Carbon Nanotubes
Abstract: This paper presents a power-aware high-performance design of ternary combinational and sequential circuits based on carbon nanotube field effect transistor (CNFET) using ternary logic. Carbon nanotube based field effect transistor (CNFET) are being studied extensively as a possible and promising choice for nanoscale integration and as successor to complementary metal oxide semiconductor (CMOS) devices. Ternary logic circuit has attracted substantial interest due to its simplicity, energy efficiency, and reduced interconnect …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 3, 2013 · pp. 27–36 Read article
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Analysis and Characterization of Different Topologies of Dynamic Latch based CMOS Comparators for Delay, Offset and Power
Abstract: This paper presents the analysis and characterization of various topologies of dynamic latch based complementary metal oxide semiconductor (CMOS) comparator. Various comparator topologies like resistor divider comparator (RDC), differential pair comparator (DPC), double-tail dynamic latched comparator (DTDLC), energy efficient two-stage comparator (ETWC) and two-stage dynamic comparator (TSDL) are analyzed and compared for various performance parameters. Besides zero static power consumption, resistor divider comparator has high offset voltage and it depends …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 2, 2016 · pp. 86–98 Read article
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Implementation of Low Power Shift Registers Using Multi-Threshold CMOS Technique
Abstract: This paper enumerates the design of low power shift registers using dual-edge triggered flip-flop (DETFF). In the conventional shift registers, high leakage current is becoming a significant contributor to power dissipation. In order to overcome this problem, the multi-threshold complementary metal oxide semiconductor (MTCMOS) technology is used for leakage minimization in proposed designs. This technology features both low-threshold and high-threshold voltage MOSFETs. High-threshold voltage MOSFETs reduced the standby leakage current …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 2, 2016 · pp. 53–61 Read article
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Single Bit Low-Power High-Speed Full Adder
Abstract: This paper presents a high-speed low-power full adder cells that lead to have a reduced power-delay product (PDP). A comparison against other full-adder structure as having low PDP, in terms of speed, power consumption and area of cells is carried out. This paper contains, a hybrid 1-bit full adder design employing both complementary metal-oxide semiconductor (CMOS) and transmission gate logic styles. First implemented was the design for 1 bit then …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 2, 2017 · pp. 55–60 Read article
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Quantum Behavior of Charge Carriers in a Symmetrical Double Gate MOSFET
Abstract: Our earlier work on modeling of single gate n-channel metal oxide semiconductor field effect transistor (MOSFET) has been extended to discuss the quantum behavior of charge carriers in symmetrical double gate (DG) MOSFET. The potential profile in the channel region of DG MOSFET has been obtained in parabolic approximation. The parabolic potential facilitates analytical expression for electric field. The appropriate Schrodinger’s equation has been solved to obtain wave functions in …
Published in Journal of VLSI Design Tools and Technology · Vol. 11, Issue 1, 2021 · pp. 17–28 Read article
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Hardware and Power Efficient Single Bit Full Adder Using GDI and PTL Technique
Abstract: Abstract: This study presents hardware and power efficient single bit full adder which consists of two techniques, Pass Transistor Logic (PTL) and Gate Diffusion Technique (GDI). Several logic families are described by PTL which is utilized in the architecture of integrated circuits. PTL technique is used to decrease the number of transistors in the circuits to make different logic gates. GDI technique is utilized for the low power consumption. CADENCE …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 7, Issue 3, 2019 · pp. 9–17 Read article
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Sub-nano Regime DG-MOSFETs
Abstract: AbstractThe significance of device performance of Gallium Nitride based double gate metal-oxide- semiconductor field-effect-transistor has been executed. The simulations were done by Silvaco Atlas simulation software with focusing on non-equilibrium green function (NEGF). Multiple gate length (LG=9.1 nm) was observed to distinguish the transfer characteristics curve. The other concentration was observed for device ON-State Current (ION), OFF-State Current (IOFF), Drain Induced Barrier Lowering (DIBL), Sub Threshold Slope (SS) and Electric …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 3, 2018 · pp. 1–6 Read article
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Thin-Film Quantum Photonic Technologies for Quantum Teleportation
Abstract: One of the most important protocols in distributed quantum computing and quantum communication is quantum teleportation, which allows quantum information to be sent between distant nodes without actually sending the quantum particle. The teleportation process is fundamentally based on quantum entanglement, Bell state measurements, and classical communication channels, which collectively allow the accurate reconstruction of an unknown quantum state at a remote location. In recent years, rapid progress in integrated …
Published in Journal of Thin Films, Coating Science Technology & Application · Vol. 13, Issue 2, 2026 · pp. 01–19 Read article
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Simulation of Current Density of Oxide Layer Materials & Synthesis, Characterization of Nano Lanthanum Aluminate and Its Dielectric Analysis
Abstract: The complementary metal-oxide semiconductor (CMOS) technology is in an urge requirement of high dielectric material especially at nano level scaling to avoid quantum mechanical tunnelling and leakage current. Hence to optimize the device performance and to compare the conventional SiO2 oxide material with the selected novel high K material (LaAlO3), the SiO2 and LaAlO3 materials are atomically built in the Virtual Nano Lab – Quantum Wise version 12.8.0 software and …
Published in Nano Trends – A Journal of Nano Technology & Its Applications · Vol. 17, Issue 2, 2015 · pp. 10–14 Read article
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Effects of High-κ on Device Performance of Nano-Regime GaN-based MOSFETs
Abstract: GaN-based metal-oxide semiconductor field-effect transistors (MOSFETs) are very promising for future digital-logic-device applications. Different gate dielectric materials are employed to evaluate the figure-of-merit of GaN-based MOSFETs. The gate length (LG) is kept constant at 10 nm. The gate voltage varies from 0 V to 1 V for the device switching from turn OFF to turn ON-state. For the device with HfO2 as gate oxide, the ON-state current (ION) and OFF-state …
Published in Journal of Semiconductor Devices and Circuits · Vol. 3, Issue 2, 2016 · pp. 21–26 Read article
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Ternary Logic Design Approach - From CMOS to CNTFET
Abstract: The goal of this review is to offer a broad study on the ternary logic designs based on CMOS (complementary metal-oxide-semiconductor) and CNTFET (carbon nanotube field effect transistor) suitable for energy efficient and high-performance VLSI design. Performance investigation of the ternary logic-based designs will be the primary emphasis as the ternary logic is a good substitute for the conventional binary logic among all the multiple-valued logics because it permits simple …
Published in Journal of Nanoscience, NanoEngineering & Applications · Vol. 8, Issue 2, 2018 · pp. 20–30 Read article
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Unconventional Methodology for Crafting Nano-Scale SOI-Based Devices Tailored for 5GMillimeter Wave Implementations
Abstract: The advent of 5G technology has indeed revolutionized modern life, bringing about unprecedented ease and giving rise to a myriad of emerging applications such as Artificial Intelligence (AI), Augmented and Virtual Reality (AR/VR), and Industry 4.0. This transformative technology has particularly catalyzed advancements in the medical and communication fields, prompting the need for innovative nanoscale devices to enhance system performance. The higher-frequency applications facilitated by 5G, such as Massive Machine …
Published in Journal of Nanoscience, NanoEngineering & Applications · Vol. 13, Issue 2, 2023 · pp. 1–10 Read article
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Enhancing the Efficiency of Subthreshold Nanoscale MOSFETs for IoT Applications.
Abstract: In the contemporary landscape of the Internet of Things (IoT), this study focuses on the design and optimization of underlap Silicon-on-Insulator Metal-Oxide-Semiconductor Field-Effect Transistors (SOI MOSFETs) tailored for real-time IoT applications. Employing an optimal spacer size (approximately 0.8 times the gate length, or LG), the device exhibits, at an operational frequency of20 GHz, an intrinsic gain of about 25 dB in the low to moderate inversion region (VOD=VGS– VTH≤90 mV, …
Published in Journal of Nanoscience, NanoEngineering & Applications · Vol. 13, Issue 3, 2023 · pp. 1–7 Read article
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Electrical Performance of the Silicon Nanowire Double Gate FET
Abstract: Silicon nanowire (SiNW) metal-oxide-semiconductor field-effect transistor (MOSFET) is a promising candidate of future CMOS device for further scaling. As the cross-sectional dimensions of SiNW channel is very small, cross-sectional shapes should affect electrical characteristics of SiNW FETs. In this work, effects of cross-sectional shapes of gate stack formation on (i) properties of double gate of SiNW FET; (ii) carrier transport properties including on-current, effective carrier mobility and inversion charge density; …
Published in Nano Trends – A Journal of Nano Technology & Its Applications · Vol. 22, Issue 3, 2020 · pp. 5–11 Read article
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Performance Improvement of Polymer and Silicon Solar Cells Using Transition Metal Oxide Interfaces
Abstract: Fossil fuels are running out, which is contributing to greenhouse gas emissions and climate change due to the world's growing energy demand. Renewable energy, which is environmentally friendly, is crucial for balancing the demand and supply of energy in our society.The non-traditional energy source with the fastest rate of growth is solar cells, which use photovoltaic technology to convert sunlight into electrical power.Conjugated polymers and large molecules are used in …
Published in Journal of Polymer & Composites · Vol. 12, Issue 5, 2024 · pp. 66–75 Read article
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Effect of Nano Metal Oxide Loading Rates on Polymer-Nano Metal Oxide Nanocomposites
Abstract: Many industries, such as those in the fields of medicine, textiles, cosmetics, agriculture, optics, food packaging, optoelectronics, semiconductors, aerospace, building materials, and catalysis, utilise nanoparticles and nanocomposites in a variety of applications. A unique class of materials, polymeric nanocomposites outperform their microparticle counterparts by fusing organic polymers with inorganic nanoparticles. Consequently, they ought to advance the field of engineering applications. The presence of inorganic nanoparticles can significantly alter the properties …
Published in Journal of Nanoscience, NanoEngineering & Applications · Vol. 14, Issue 1, 2024 · pp. 1–12 Read article
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Comparison of Photocatalytic activity of Various Metallic and Non-metallic doped TiO2 Nano Particles for Treatment of Pharmaceutical Effluent
Abstract: The use of semiconductor oxide particles such as TiO2 as photo catalysts has shown great utility in the complete mineralization of organic compounds present in effluent. The dopant maximize the electron trapping for further inhibiting excitation recombination and thereby enhancing the oxidation of organic compounds. A pilot scale synthesis of TiO2 nano particles has been carried out using the Sol-gel method with various metallic dopants like Iron, Copper, Cobalt, Vanadium, …
Published in Journal of Nanoscience, NanoEngineering & Applications · Vol. 8, Issue 2, 2018 · pp. 7–14 Read article