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24 articles for “logic gate”
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Simulation of Adder Circuit Using Reversible Gates in Verilog HDL
Abstract: The emerging field of quantum computing uses quantum logic gates. The reversibility of logic gates is an important aspect of quantum logic gates used in VLSI and quantum computing. Reversibility ensures that power consumption is minimized. This study explores the field of reversible logic and utilizes Peres gate to develop a full adder circuit that shows a significant reduction in power consumption in simulations performed in Xilinx Vivado. We have …
Published in Journal of VLSI Design Tools and Technology · Vol. 14, Issue 3, 2024 · pp. 32–38 Read article
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High Performance Multi-Valued Logic (MVL)Gate Design Using FinFET
Abstract: CMOS scaling faces challenges such as leakage, power dissipation, and short channel effects. Multi-Valued Logic (MVL) offers higher information density and reduced interconnections. This work presents a FinFET-based MVL gate design that improves electrostatic control, switching speed, and reliability. Simulation results confirm reduced leakage power and enhanced performance compared to conventional logic. The proposed architecture demonstrates scalability for advanced technology nodes. It also shows potential for low-power applications in portable …
Published in Journal of Microelectronics and Solid State Devices · Vol. 13, Issue 1, 2026 · pp. 34–45 Read article
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Proposed System: Quantum Computing Processor Based on Linear Number Relation
Abstract: This paper details the design and implementation of a specialized quantum processor tailored for efficiently evaluating custom mathematical formulas. Optimized to perform a specific set of arithmetic and logical operations, this processor delivers a stable and high-performance computing platform. Unlike general-purpose quantum processors, which are designed for versatility across a wide range of algorithms, this dedicated processor aims to enhance performance and accuracy for a targeted set of tasks. The …
Published in Recent Trends in Parallel Computing · Vol. 11, Issue 3, 2024 · pp. 24–32 Read article
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Spintronic Logic Circuits for Ultrafast Processing
Abstract: Spintronic logic has emerged as one of the most promising post-CMOS paradigms capable of addressing the speed, density, and energy challenges of deeply scaled silicon technologies. By relying on the intrinsic properties of electron spin and magnetization dynamics, spintronic devices—particularly Magnetic Tunnel Junctions (MTJs), Spin-Transfer Torque (STT), and Spin–Orbit Torque (SOT) structures—enable ultrafast, non-volatile data processing with significantly reduced energy consumption. Despite remarkable device-level advancements, circuit- level realization of high-speed, …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 3, Issue 2, 2025 · pp. 35–43 Read article
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Building Knowledge with a Hands-on 8-bit CPU Architecture Simulation Kit for Students
Abstract: It is now crucial for students studying electronics and information technology to comprehend computer architecture and logic design. Hands-on, practical instruction is required to assist students in understanding Computer Organization and Architecture (COA). Our kit, which covers essential components including bus interfaces, arithmetic, and logic units (ALU), memory structures, and functional registers, is based on the Von Neumann architecture. Theoretical techniques like block diagrams and top level diagrams are typically …
Published in Journal of Electronic Design Technology · Vol. 15, Issue 3, 2024 · pp. 1–9 Read article
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Design of Optimized Full Adder using Noise-Mitigation Techniques and Power Gating
Abstract: With the advent of nanoscale technology, a new era of power consumption, speed, and reliability challenges for traditional static CMOS logic has begun. To solve these problems, dynamic logic families—particularly domino logic—have emerged as potent substitutes that offer quicker processing speeds and lower power consumption. The design and optimization of a full adder circuit using domino logic is shown in this study. A dynamic domino logic technique is used to …
Published in Journal of Microelectronics and Solid State Devices · Vol. 11, Issue 3, 2024 · pp. 1–6 Read article
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Novel approaches to the Design and Optimization of Universal Shift Register with Reversible logic
Abstract: Reversible logic is gaining importance in new multi-disciplinary fields, such as quantum computing, low-power computing, and even nanotechnology. The study of reversible gates has quickly evolved as a distinctive area of research as a result of the new developments aimed at fully utilizing resources and performing operations without any loss of information. With chip integration, these USRs, or Universal Shift Registers, have now become fundamental sequential components needed in various …
Published in Journal of VLSI Design Tools and Technology · Vol. 15, Issue 3, 2025 · pp. 21–28 Read article
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The Role of Majority Functions in Enhancing Full Subtractor Performance in High-Density Logic Circuits
Abstract: In the present trend of very large-scale integration (VLSI) technology, implementing a Boolean function with the fewest number of gates (logic) has always been important. Low power design strategies now provide much more benefits than in the past. Performance, affordability, and dependability may be key issues in this area of technology design. Power dissipation is now recognized as a crucial component in the development of competitive market areas such wireless …
Published in Journal of Semiconductor Devices and Circuits · Vol. 11, Issue 2, 2024 Read article
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Verilog-Based Image Processing on Field Programmable Gate Arrays: Design and Implementation
Abstract: Integrated circuits known as Field Programmable Gate Arrays (FPGAs) are frequently offered for sale off the shelf. They are known as "field programmable" because, following manufacture, they enable users to modify the hardware to satisfy particular use case needs. This makes it possible to update features and correct bugs in-place, which is very helpful for remote deployments. Configurable logic blocks (CLBs) and a series of programmable interconnects are features of …
Published in Journal of Semiconductor Devices and Circuits · Vol. 11, Issue 3, 2024 · pp. 13–26 Read article
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Design And Optimization Of High-Speed Array Multiplier
Abstract: An array multiplier is a digital circuit used for the rapid multiplication of binary numbers. It employs an array of logic gates to generate partial products concurrently, significantly enhancing speed. The array structure divides the multiplication task into smaller, parallel processes, allowing for efficient parallel processing of multiple bits. Each cell within the array manages specific bit-level multiplications, and their results are summed to produce the final product. This parallel …
Published in Journal of Microelectronics and Solid State Devices · Vol. 11, Issue 3, 2024 Read article
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Quantum-Fuzzy Tensor Operators and Uncertainty-Band Bifurcation for Symmetry-Preserving State Discrimination
Abstract: A tensor-operator framework is developed for fuzzy conjunction, fuzzy disjunction, and symmetry-preserving state discrimination in multi-qubit quantum systems. In this formulation, fuzzy membership and non-membership degrees are represented through expectations of effect operators acting on density matrices, providing a natural bridge between fuzzy logic and quantum measurement theory. Conjunction and disjunction operations are extended to the quantum domain via tensorised channels, constructed using projective measurements and unitary transformations, enabling logical …
Published in Emerging Trends in Symmetry · Vol. 2, Issue 1, 2026 · pp. 08–15 Read article
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Design and Implementation of Low Latency 16-bit Full Adder
Abstract: In the new age world, modern technology has vast applications in various fields of engineering, medicine, and others. Digital electronics processing and systems play a vital role in the analysis and computation of data representation. Electronic systems have gradually become faster and smaller scale. The primary structural element of any modern ALU-based processor is an adder. Addition is a well-known extremely basic function that is employed in nearly all computing …
Published in Journal of VLSI Design Tools and Technology · Vol. 14, Issue 3, 2024 · pp. 21–31 Read article
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Efficient Machine Defect Detection with Sugeno Fuzzy Membership and GRU Networks for Robust Industrial Automation
Abstract: Machine fault detection is of immense significance in industrial automation to achieve efficient operations, reduced downtime, and reduced economic losses. Sugeno fuzzy logic and Gated Recurrent Unit (GRU) networks are used in this research to provide a new hybrid solution that addresses problems such as noisy data, evolving defect patterns, and real-time detection. To improve readability and reliability, the Sugeno fuzzy logic unit preprocesses fuzzy and uncertain input data into …
Published in Journal of Mechatronics and Automation · Vol. 12, Issue 2, 2025 · pp. 17–26 Read article
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R-M and M-R Model for Interpreting Logic State of Memristor Aided NOR with Enhanced Noise Margin
Abstract: Memristive crossbar arrays are one of the fascinating subjects in the field of nanoelectronics and memory devices. The arrangement of arrays consists of grid-like structure with rows and columns of memristors which are resistive devices that can preserve their resistance state even after power is turned OFF. They have now emerged as a promising alternative to traditional memory technologies due to their high density, non-volatility and low power consumption. This …
Published in Recent Trends in Mathematics · Vol. 1, Issue 1, 2024 · pp. 35–41 Read article
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Intelligent automated railway crossing gate control system
Abstract: The high incidence of accidents at railway level crossings due to human errors and lack of proactive track monitoring is a challenge for rail safety in high-density networks. This paper proposes the development and validation of an intelligent automated railway crossing system- IARCS that leverages sensor fusion and IoT communication to eliminate human dependency and mitigate intrusion risks. The core system deploys an Arduino Uno for the purpose of primary …
Published in Journal of Microcontroller Engineering and Applications · Vol. 13, Issue 1, 2026 · pp. 20–28 Read article
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Design and Implementation of Low-power SPI Shift Register
Abstract: SPI stands for serial peripheral interface which is used for serial, synchronous and full duplex communication of data between master and slave devices. Master devices can be Microprocessors or Microcontrollers; and slaves are the Peripheral devices interfaced with them. The main internal component for architecture of master/slave block is shift register which defines its operation. But as the size of the shift register increases, power is utilized to a greater …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 1, 2023 · pp. 1–15 Read article
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Performance Comparison of Noise-Tolerant, High- Performance CMOS Domino Logic Configurations
Abstract: In high-performance VLSI chip design, domino logic configuration is often preferred over static logic due to its faster operation and smaller area footprint, especially in deep submicron (DSM) technology. However, DSM noise has become a significant challenge in domino-based circuits, leading to compromises in the reliability and signal integrity of integrated circuits (ICs). The switching threshold of domino logic, defined as the input voltage level at which the gate output …
Published in Journal of Semiconductor Devices and Circuits · Vol. 12, Issue 2, 2025 · pp. 35–50 Read article
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A Majority Function Based Full Subtractor
Abstract: In the present landscape of very large-scale integration (VLSI) technology, the imperative to implement Boolean functions with minimal gate count remains a cornerstone of efficient circuit design. This pursuit has only grown more critical with the evolution of low-power design strategies, which now offer significantly enhanced benefits compared to traditional approaches. The trifecta of performance, affordability, and dependability continue to drive innovation in this field, shaping the trajectory of technological …
Published in Research & Reviews : Journal of Physics · Vol. 13, Issue 2, 2024 · pp. 8–14 Read article
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A Review on Automatic Railway Gate Control System
Abstract: Railway transportation is one of the most efficient and widely used modes of transport; however, safety at level crossings remains a critical issue, especially at unmanned or manually operated gates. A significant number of accidents happen as a result of human carelessness, insufficient coordination, and postponed gate operations. To address these issues, the Automatic Railway Gate Control System has been created as a viable solution to improve safety and minimize …
Published in Journal of Control & Instrumentation · Vol. 17, Issue 2, 2026 Read article
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A Study on Polymer-Based FinFET Applications and Logic Circuit Implementation with FinFET
Abstract: Nano devices play a crucial role in the semiconductor industry and can work as the solution for the problems like scaling of MOSFET. The FinFET can serve as the substitute of bulk CMOS in nanoscale. It mainly consists of two gate terminals which can be either shorted or kept independent.The shorted gate (SG-FinFET) configuration provides higher Ion and Ioff whereas the Independent Gate (IG-FinFET) configuration reduces the transistor count and …
Published in Journal of Polymer & Composites · Vol. 13, Issue 1, 2025 · pp. 312–340 Read article