STM Journals Peer-reviewed research from Consortium e-Learning Network

Journal of Electronic Design Technology Original Research

Building Knowledge with a Hands-on 8-bit CPU Architecture Simulation Kit for Students

  1. Ajinkya Kshirsagar Department of Electronics and Communication Engineering. Dharmsinh Desai University
  2. Ashit Gajjar Department of Electronics and Communication Engineering. Dharmsinh Desai University
  3. Hetal Shah Department of Electronics and Communication Engineering. Dharmsinh Desai University,

Abstract

It is now crucial for students studying electronics and information technology to comprehend computer architecture and logic design. Hands-on, practical instruction is required to assist students in understanding Computer Organization and Architecture (COA). Our kit, which covers essential components including bus interfaces, arithmetic, and logic units (ALU), memory structures, and functional registers, is based on the Von Neumann architecture. Theoretical techniques like block diagrams and top level diagrams are typically used to teach COA, and they frequently ignore the digital design component. Students get a deeper knowledge of how theoretical concepts appear in practical systems by creating a completely functional CPU from scratch. The purpose of this research is to use digital logic gates to construct an 8-bit CPU based on the SAP-1 Architecture. Students will gain a deeper understanding of Computer Architecture and Organization (CAO) with the use of this simulation kit. Students can study digital construction, gain an understanding of CPU operation, and develop the skills necessary to construct customized computers using this kit by working with logic gates. Using digital logic gates in a real hardware simulation, this research presents a model that illustrates the intricate workings of an 8-bit CPU. Students who use this method could construct personalized computers and gain more intuitive knowledge.

Keywords

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