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20 articles for “sub threshold current”
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Analysis and Characterization of Circuits for Leakage Power Reduction at Sub-50 nm in CMOS Circuits
Abstract: This paper analyzes various techniques to decrease leakage power in complementary metal oxide semiconductor (CMOS) very large scale integration (VLSI) circuits, because due to continuous scaling of CMOS technology there is improvement in speed of semiconductor devices and the side effect of this scaling is leakage power. With the development of technology in CMOS VLSI Circuit, length of transistors has been reduced and speed of operation is increasing simultaneously. As …
Published in Journal of Electronic Design Technology · Vol. 13, Issue 2, 2022 · pp. 11–22 Read article
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Reduce the Leakage Current and Power in VLSI Technology
Abstract: Demand for portability Reduce and increase in size, low cost, low dynamic power, low leakage current, low sub threshold current, and the necessity to minimise at least one of these. Circuit complexity increases with circuit integration. Memory and microprocessors are included in mass-produced chips. Microcomputer systems central system memory uses dynamic random-access memory (DRAM). One benefit of DRAM memory is its high speed and capacity integration. The examination of DRAM …
Published in Journal of VLSI Design Tools and Technology · Vol. 13, Issue 3, 2023 · pp. 19–25 Read article
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Design of Energy Efficient Clock System
Abstract: Energy efficiency is a key metric for energy constrained Ultra Low Power (ULP) VLSI applications such as wireless sensor nodes, pace makers, hearing aids etc. These applications need clock system in their signal processing and communication sub-system. Moreover, clock system plays a vital role in governing the reliability, power consumption and performance of synchronous system. In today’s era of portable electronics, power consumption has emerged as a forefront design metrics. …
Published in Journal of VLSI Design Tools and Technology · Vol. 9, Issue 2, 2019 · pp. 1–7 Read article
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Study of Scaling of MOSFET on Various Electrical Characteristics using Silvaco TCAD Tool
Abstract: MOSFETs are the driving work horse of semiconductor industry. Over the years, the MOSFET device density has been continuously increasing owing to the reduction in channel length of MOSFET device. This article discusses the effect of scaling i.e. channel length and gate oxide thickness on various parameters like threshold voltage, transconductance, maximum drain current and subthreshold slope. It is important to consider that with scaling of the channel length; the …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 1, 2018 · pp. 11–19 Read article
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Advanced Mathematical Modelling of Nanoscale Semiconductor Devices for Low-Power Microelectronic Applications
Abstract: With the ongoing scaling down of semiconductor devices, there is an increasing need for accurate mathematical models of electrostatic control, carrier transport, leakage current, and power consumption at the nanometer scale. As the sizes of semiconductors continue to decrease, there is a growing need for accurate mathematical models of electrostatic control, carrier transport, leakage current, and power consumption at the nanometer scale. In this work, a common mathematical modelling approach …
Published in Journal of Microelectronics and Solid State Devices · Vol. 13, Issue 2, 2026 Read article
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Modeling and Simulation of Pentacene based Organic Thin Film Transistors with Organic Gate Dielectrics
Abstract: AbstractTwo structures of pentacene organic thin film transistors (OTFT) with organic dielectrics, polymethyl methacrylate (PMMA) and polyvinyl alcohol (PVA) have been numerically simulated with TCAD ATLAS tool. Output and transfer characteristics were simulated and mobility, threshold voltage, sub threshold swing (SS) and current on/off ratio that play a part in the increment of conductivity of device were extracted. The authors show that the semiconductor-insulator interface actively affects the performance of …
Published in Journal of Microelectronics and Solid State Devices · Vol. 4, Issue 3, 2017 · pp. 13–18 Read article
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Investigation and Dependency Analysis of Silicon Film Thickness on Performance of Surrounding Gate MOSFET at Subthreshold Regime
Abstract: The characteristics of cylindrical gate all around MOSFET have been studied in terms of the dependence of various device performance metrics on silicon film thickness (Tsi). In this work, the effect of silicon film thickness on numerous performance metrics like threshold voltage (Vt), On current (Ion), subthreshold leakage current (Ioff), On-Off current ratio (Ion/Ioff) and DIBL of cylindrical GAA are comprehensively evaluated and analysed. It has been observed that cylindrical …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 2, 2018 · pp. 49–54 Read article
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Design and Optimization of Nano scale Double Gate SOI-MOSFET for Analog Applications Using SILVACO TCAD
Abstract: In this paper the structure effect on electrical characteristics of 60-nm double-gate Silicon-on-Insulator Metal-Oxide-Semiconductor Field Effect Transistor (DG-SOI-MOSFETs) is explored. These structures enable more aggressive device scaling in nano scale region because of their ability to control short channel effects. Established a scaling theory which gives guidance for the device optimization (Silicon film thickness Tsi (20nm); gate oxide thickness Tox (3nm); buried oxide thickness Tbox (200nm) and gate length LG …
Published in Journal of Electronic Design Technology · Vol. 1, Issue 1-3, 2011 · pp. 7–17 Read article
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A Novel Design for Power Reduction in Arithmetic Circuits using MTCMOS Technology
Abstract: In CMOS logic circuits, the reduction in the threshold voltage due to voltage scaling leads to increase in the subthreshold leakage current and hence static power dissipation. Although power consumption is important for modern VLSI design, operation speed and occupied area are still the main requirements of the VLSI design. Multi threshold voltage CMOS (MTCMOS) technology is a good solution which provides a high performance and low-power design without any …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 1, 2014 · pp. 1–7 Read article
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Sub-nano Regime DG-MOSFETs
Abstract: AbstractThe significance of device performance of Gallium Nitride based double gate metal-oxide- semiconductor field-effect-transistor has been executed. The simulations were done by Silvaco Atlas simulation software with focusing on non-equilibrium green function (NEGF). Multiple gate length (LG=9.1 nm) was observed to distinguish the transfer characteristics curve. The other concentration was observed for device ON-State Current (ION), OFF-State Current (IOFF), Drain Induced Barrier Lowering (DIBL), Sub Threshold Slope (SS) and Electric …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 3, 2018 · pp. 1–6 Read article
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Wilson Current Mirror Based Energy Efficient Level Shifter
Abstract: AbstractLevel shifter plays a key role in modern electronics circuits in order to have higher efficiency. A circuit may contain parts that are working at two voltage levels. So a level shifter converts a subthreshold voltage level to a threshold voltage level. Multivoltage systems utilize the advantage of level shifters. Here, modified Wilson current mirror is used for obtaining level shifted output. Measurement results were demonstrated by using Cadence tools.Keywords: …
Published in Recent Trends in Electronics Communication Systems · Vol. 5, Issue 3, 2018 · pp. 32–37 Read article
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Design and Analysis of Source Current Effect on Preamplifier-Positive Feedback-based CMOS Comparator Using 90 nm Technology
Abstract: One of the most important and essential components of the data converter circuit is the comparator and this paper presents the implementation and characterization of the basic and simplest CMOS comparator in 90 nm technology. Once the technology scales down, the design and implementation becomes an essential issue at sub-micron and deep-sub-micron technology. The behavior of the threshold voltage in the CMOS is not a linear quantity when the parameters …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 3, 2013 Read article
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Development of Polymer Based SRAM Cell with Enhance Low Power Performance
Abstract: Low-power memory technologies are in high demand with the rapid growth of portable electronics and energy-efficient computing systems. Static random-access memory (SRAM) plays a crucial role in processors, cache memories, and system-on-chip applications due to their speed and reliability. Static Random Access Memory (SRAM) is typically implemented using complementary MOS (CMOS) technology, which integrates both PMOS (P-channel Metal–Oxide–Semiconductor) and NMOS (N-channel Metal–Oxide–Semiconductor) transistors. However, as technology scales to deep submicron …
Published in Journal of Polymer & Composites · Vol. 14, Issue 1, 2026 · pp. 1439–1448 Read article
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A Dual Material Control Gate Tunnel Field Effect Transistor for an Asymmetric Doping at Source and Drain Regions
Abstract: Double-Gate tunnel FET devices, which uses high-κ gate dielectric, are explored using realistic design parameters, showing an ON-current as high as 0.23 mA, a gate voltage of 1.8 V, an OFF-current of not more than 1 fA (neglecting gate leakage), an improved ordinary subthreshold swing of 57 mV/dec, and a lower point slope of 11 mV/dec. A dual material control gate tunnel field effect transistor for an asymmetric doping at …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 3, 2018 · pp. 45–53 Read article
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Air Quality monitoring system
Abstract: Air pollution has emerged as one of the most serious environmental challenges of the modern era, posing significant threats to human health, ecological balance, and overall quality of life. Rapid industrialization, urbanization, increasing vehicular emissions, and the extensive use of fossil fuels have led to a continuous rise in air pollutant levels, especially in densely populated urban areas. Air pollution has emerged as a major environmental and public health concern …
Published in International Journal of Environmental Noise and Pollution Control · Vol. 4, Issue 2, 2026 · pp. 1–11 Read article
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A Survey on Ultra Low Power Design Techniques for IOT Application
Abstract: AbstractInternet of Things (IOT) is evolving as technology’s megatrend, unlocking new opportunities and questions for the semiconductor industry. IOT sensing and actuation devices essentially should be low cost and also should deliver a complete System on Chip (SOC) solution capable of computation, security and wireless communication at very low power levels. The sub-threshold operation, Radio Frequency (RF) redesign, and extreme optimization techniques can minimize power consumption of IOT devices. This …
Published in Current Trends in Information Technology · Vol. 7, Issue 3, 2017 · pp. 9–16 Read article
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Design and Verification of Low Power High Speed Voltage Level Shifter Based on Pass Transistor Methodology
Abstract: This study explains how a voltage level shifter (LS) can be built using a Wilson current mirror level shifter (WCMLS) with a mirrored output. The proposed fix avoids WCMLS's typical issue of requiring a mirror with a size ratio that is too large. It's a space- and cost-saver. The proposed LS requires less components than its modern versions and uses only tiny components, taking up even less space. The proposed …
Published in Journal of Control & Instrumentation · Vol. 14, Issue 2, 2023 · pp. 30–37 Read article
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Switched Capacitor-based RC Filter
Abstract: Today we know that the demand of low voltage for low power integrated circuits (ICs) are used for growing the portable equipment in all the markets including telecommunication, computers and customer electronics with smaller size. The low voltage need for ICs is also motivated by the new dip submicron complementary metal oxide semiconductor (CMOS) technology scaling that required all transistors of smaller size. In current years, a lot of researches …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 1, 2016 · pp. 32–40 Read article
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A Circuit Approach for CMOS VLSI Circuit Leakage Power Reduction
Abstract: Despite the fact that scaling CMOS technology boosted speed, leakage currents always remained an issue. The issue has gotten worse as the scaling has gone into the UDSM (ultra-deep-submicron) range. In order for the circuit to function effectively, these unwanted leakage currents must be reduced to a minimum. It is challenging to create these leakage-free nano-scale CMOS circuits. In this work, the issue of leakage power is addressed, which occurs …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 10, Issue 3, 2022 · pp. 7–18 Read article
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Influence of Dielectric and Active layer Thickness on MgZnO Thin Film Transistor Electrical Characteristics
Abstract: From last decades, Thin Film Transistors Technology uses low-k dielectric material as an insulator. Insulator thickness plays an important role in device dimension. The insulating layer also known as the gate oxide separates the gate electrode from the channel region of the transistor. If the insulating layer is too thin, there is a greater chance that electrons can tunnel through the oxide layer, leading to leakage current. To mitigate this …
Published in Journal of Polymer & Composites · Vol. 11, Issue 5, 2023 · pp. 17–26 Read article