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1050 articles for “Multiplication”
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Study of Multiple-Input Multiple-Output DC-DC Converter for DC Microgrid Applications
Abstract: DC microgrids have been developed because of the integration of renewable energy sources and the rising demand for sustainable energy solutions. DC microgrids offer numerous advantages such as increased efficiency, reduced transmission losses, and enhanced reliability. However, the varying output characteristics of renewable sources and the dynamic nature of loads within a microgrid necessitate efficient power management systems. In order to overcome these difficulties, MIMO (Multiple-Input Multiple-Output) DC-DC converters have …
Published in Trends in Electrical Engineering · Vol. 13, Issue 3, 2023 · pp. 16–23 Read article
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A Novel Efficient VLSI Architecture for Matrix Multiplication using Compressor-based Multiplier
Abstract: Due to advancement of new technology in the field of VLSI, there is an increasing demand of high speed processor. Matrix multiplication is highly used in different types of computations. Speed of processor greatly depends on its multiplier (used in matrix multiplication) performance. Due to which high speed multiplier architecture become important. Several multiplication techniques have been developed to increase the efficiency of the multiplier. These techniques help in reducing …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 2, 2015 · pp. 23–28 Read article
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Design, Implementation and Comparative Analysis of Different 8-Bit Multipliers Based on Power, Delay and Hardware Utilization
Abstract: Multipliers play important role in the digital VLSI design. Computational Speed, power consumption, and area are the major parameters on which the performance of the device depends. In digital design, there are different multiplication methods or algorithms. Each algorithm is having its own advantage and disadvantage. In this paper, implementation of five different types of 8-bit multipliers namely Array multiplier, Booth multiplier, Truncated multiplier, Pipelined multiplier, and Vedic multiplier has …
Published in Journal of VLSI Design Tools and Technology · Vol. 10, Issue 3, 2020 · pp. 22–34 Read article
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Energy Management of a Solar Powered Electric Vehicle with Multiple-Energy Storage via Optimized Fuzzy Controller
Abstract: The optimum energy management is the main challenge of powered electric vehicles (EVs) with multiple energy storage systems. The solar powered EVs are enabled with multiple energy sources and storages, and so, achieving the optimum energy management schedule is a complicated optimization problem. This paper develops an optimized fuzzy controller using genetic algorithm (GA) for energy management of solar powered EV equipped with photovoltaic cells as well as two power …
Published in Journal of Control & Instrumentation · Vol. 7, Issue 3, 2016 · pp. 28–38 Read article
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Investigations on the impact of modulation formats and weather conditions in FSO link employing polarization division multiplexing and coherent detection-orthogonal frequency division multiplexing
Abstract: Free space optics (FSO) is a communication system where free space acts as medium between transceivers and they should be in line-of-sight for successful transmission of optical signal. Medium can be air, outer space, or vacuum. This system can be used for communication purpose in hours and in lesser economy. There are many advantages of FSO like high bandwidth and no spectrum license. The transmission in FSO is dependent on …
Published in Journal of VLSI Design Tools and Technology · Vol. 10, Issue 2, 2020 · pp. 17–25 Read article
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Study of Multiple Input Multiple Output Free Space Optical Terrestrial Link
Abstract: AbstractAtmospheric turbulence causes mitigation in the performance of the Free Space Optical Link (FSO) transmission. The performance changes due to scintillation. To reduce the effect of scintillation, we have employed a Multiple Input Multiple Output (MIMO) FSO link which gives better performance as compared to Single Input Single Output (SISO) FSO link. We have combined the detector output with different combining techniques i.e. Selection Combining (SC), Equal Gain Combining (EGC) …
Published in Trends in Opto-electro & Optical Communication · Vol. 8, Issue 1, 2018 · pp. 25–29 Read article
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Two Port Ring Shaped DRA Based MIMO (Multiple Input Multiple Output) Antenna for WLAN Application
Abstract: This paper presents multiple input and multiple output (MIMO) antenna which is based on dielectric resonator with very good isolation. This antenna consists of two hybrid resonator and is fed by microstrip feedline through H-Shaped aperture is cut in ground plane just below the Ring DR. Area of this antenna is 40x50 mm². Impedance bandwidth (S11<-10dB) of this antenna is 5.15 to 6.15 GHz. The radiation efficiency and total gain …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 7, Issue 1, 2019 · pp. 17–24 Read article
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Efficient Gabor Filter Design Using Verilog HDL with Multiplier-accumulator (MAC) Implementation
Abstract: This paper introduces a novel and enhanced Gabor filter design aimed at addressing the demands of image processing applications using the Verilog Hardware Description Language (HDL). Specifically, it leverages the Reconstruct Gabor filter technique to elevate the performance and quality of standard image outputs. The primary objective of this research endeavor is to simplify the study, conduct an in-depth analysis, and substantially enhance the design's efficiency, all while ensuring the …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 2, 2023 · pp. 40–46 Read article
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Advancements in Multiple-Input DC–DC Converters for Hybrid Renewable Energy Systems: Topologies, Control Strategies, and Applications
Abstract: Multiple-input DC to DC converters (MICs) are essential components in hybrid energy systems, enabling efficient management of diverse energy inputs from renewable sources such as solar photovoltaic (PV) panels and wind turbines. These converters facilitate the seamless integration of variable power outputs, addressing the intermittent nature of renewable energy through advanced power electronics. This paper provides a comprehensive review of the topologies, control strategies, and applications of MICs within renewable …
Published in Trends in Electrical Engineering · Vol. 15, Issue 2, 2025 · pp. 10–17 Read article
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Comparative Analysis of Partial Product Addition in Vedic Urdhva Tiryakbhyam Multiplier
Abstract: Multiplication is one of important operations performed in many digital signal processing applications. Hence the performance of the multiplier will affect the overall performance of the DSP processor. The methods like booth multiplier, and array multiplier are used. Vedic multiplication technique had proved its importance in getting the speed of multiplication. It is required to add the generated partial products quickly, to generate the result of multiplication faster. To add …
Published in Journal of VLSI Design Tools and Technology · Vol. 13, Issue 1, 2023 · pp. 15–32 Read article
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Artificial Neural Network Implementation in FPGA using Multiplexer-based Weight Updating for Efficient Resource Utilization
Abstract: This paper presents a novel scheme for field-programmable gate array (FPGA) implementation of an artificial neural network (ANN). The proposed implementation is aimed at reducing resource requirement, without compromising on the speed so that a complex ANN architecture could be realized on a single chip at a lower cost. The weight updating process in different layers of the ANN has been carried using a simple MUX-based architecture. Backpropagation algorithm which …
Published in Journal of Semiconductor Devices and Circuits · Vol. 2, Issue 1, 2015 · pp. 1–5 Read article
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Design and Analysis of MAC Unit Using Single Precision Floating Point Vedic Multiplier
Abstract: Multiplication and accumulation are the basic operations which are important in several microprocessors and digital signal processing (DSP) applications to execute dedicated algorithms. Developing high speed MAC is essential for real time DSP application. The MAC unit determines the speed of the overall system and it lies in the critical path. As the demand for high speed design is continuously increasing, the studies related to the field of multipliers and …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 3, 2018 · pp. 28–35 Read article
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Design And Optimization Of High-Speed Array Multiplier
Abstract: An array multiplier is a digital circuit used for the rapid multiplication of binary numbers. It employs an array of logic gates to generate partial products concurrently, significantly enhancing speed. The array structure divides the multiplication task into smaller, parallel processes, allowing for efficient parallel processing of multiple bits. Each cell within the array manages specific bit-level multiplications, and their results are summed to produce the final product. This parallel …
Published in Journal of Microelectronics and Solid State Devices · Vol. 11, Issue 3, 2024 Read article
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Polymeric Hybrid Systems Engineered with Multiple-Stage Energy Absorption for Temperature Control
Abstract: Polymer–composite based phase change systems offer an effective strategy for adaptive thermal management; however, most existing systems exhibit single-stage latent heat transitions, limiting their applicability in environments with fluctuating thermal loads. In this study, a thermoplastic polyurethane (TPU) polymer matrix was reinforced with two microencapsulated paraffin-based phase change materials (PCM-A and PCM-B) to achieve multi-level latent heat storage behavior. The fabricated TPU/PCM-A10–B20 polymer–composite demonstrated two distinct endothermic transitions at approximately …
Published in Journal of Polymer & Composites · Vol. 14, Issue 1, 2026 · pp. 146–155 Read article
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A Novel Design for High Speed & Area Efficient Compressor Based Vedic Multiplier
Abstract: Multipliers are the most important part in any arithmetic and logic unit, AbstractMultipliers are the most important part in any arithmetic and logic unit, accumulators and digital signal processors. Due to the increasing constraints on delay, the design of faster multipliers is emphasized. Among several multipliers, Vedic multipliers are preferred for their speed of operation. Here the proposed Vedic multiplication techniques are based on “URDHVA TIRYAKBHYAM” a fast and efficient …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 3, 2018 · pp. 1–10 Read article
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Design and Implementation of Carry Select Adder based On Wallace tree Multiplier using Adiabatic Logic
Abstract: The Wallace tree multiplier construction using a carry select adder (CSA) and this paper discusses adiabaticlogic. The proposed design aims to reduce power consumption while maintaining high performance.Adiabatic logic is employed to reduce power dissipation by recycling energy during the logic transitions. TheWallace tree multiplier is used to perform fast multiplication of two large numbers by breaking down themultiplication process into smaller sub-tasks. The CSA is used as the adder …
Published in Journal of VLSI Design Tools and Technology · Vol. 13, Issue 2, 2023 · pp. 21–31 Read article
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Design and Implementation of A 4-bit Multiplier using Wallace Tree Architecture in 180 nm Technology
Abstract: Over the period of last decade, power dissipation has become one of the most important factors for VLSI designers in the design of most digital systems. Even though the speed and area are considered to be the critical factors in design of digital systems, there is a trade of with power consumption. Adders and multipliers are the most important arithmetic units in a processor and the major sources of power …
Published in Journal of Microcontroller Engineering and Applications · Vol. 2, Issue 1, 2015 · pp. 17–23 Read article
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Performance Analysis of Complimentary Pass Transistor Logic Based Multiplexer Using Dual-gate FinFET Technology
Abstract: AbstractThis paper presents the design and analysis of double gate FinFET complimentary pass transistor logic (CPL) multiplexer. The circuit of multiplexer (MUX) using CPL is used for comparison of performance parameters like average power consumption, rise/fall time, delay, slew rate, PDP and EDP. Multiplexer is a digital circuit, it has inputs and select line; select lines are used for select input lines to transfer data to the output end. The …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 1, 2018 · pp. 41–48 Read article
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Performance Analysis of a Subcarrier Multiplexed Qpsk Modulated Free Space Optical Mimo Transmission Link through Atmospheric Turbulence
Abstract: AbstractFree space optical (FSO) communication shows potential technology for communication. But the main weakness is atmospheric turbulence which causes major transmission destruction for an open air optical communication system. In this paper, the performance of free space optical (FSO) is analyzed using subcarrier multiplexed QPSK intensity modulated OFS link with optical intensity modulation and direct detection for a single input single output (SISO) system considering strong atmospheric turbulence. To overcome …
Published in Trends in Opto-electro & Optical Communication · Vol. 1, Issue 1-3, 2011 · pp. 32–40 Read article
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Low Power Area Efficient 4×4 Vedic Multiplier using GDI half adders with Better Delay Performance
Abstract: In the field of VLSI, wireless communication and digital signal processing, low power and area efficient architectures are considered. Majority of such applications uses multiplication. The multiplication is done using repetitive addition and shift and add method. It consumes more area delay and power. Vedic multiplier is one of the efficient multiplier. It is designed using different Vedic techniques or sutras, which reduces the area, power consumption and provide better …
Published in Journal of Control & Instrumentation · Vol. 10, Issue 2, 2019 · pp. 28–39 Read article