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30 articles for “hardware acceleration”
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Energy-Efficient Parallel Computing for Edge Devices: Techniques, Challenges, and Emerging Research Directions
Abstract: Edge computing brings computation closer to data sources, which supports low-latency applications but places substantial demands on energy-constrained and heterogeneous devices. Parallel execution across multicore CPUs, GPUs, FPGAs, and other accelerators can improve responsiveness, but it also complicates scheduling, power management, and resource allocation. This review examines six closely related technique families: energy-aware task scheduling, dynamic voltage and frequency scaling (DVFS), task offloading and resource allocation, artificial-intelligence-based optimization, hardware acceleration, …
Published in Recent Trends in Parallel Computing · Vol. 13, Issue 2, 2026 · pp. 35–41 Read article
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A Comprehensive Review on IoT and Edge Computing in Electronics: Trends, Challenges, and Future Directions
Abstract: The Internet of Things (IoT) transformed the electronics industry by enabling ubiquitous connectivity between billions of devices. This has created an unprecedented amount of data, challenging traditional cloud-based architectures with latency, bandwidth, and security issues. Edge computing came as an additive architecture by distributing computation and bringing intelligence to IoT edges to provide real-time responsiveness and reduce dependence on centralized infrastructure. This study offers a thorough analysis of current developments …
Published in Journal of Electronic Design Technology · Vol. 17, Issue 1, 2026 · pp. 1–9 Read article
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Optimized Hardware Realization of AES for High-Throughput FPGA Platforms
Abstract: The Advanced Encryption Standard (AES) is the predominant symmetric-key cryptographic algorithm used for securing digital communication across embedded systems, IoT devices, cloud infrastructures, and defense networks. Although software-based AES implementations offer flexibility, they often fail to meet the high-speed, low-latency, and energy-efficient requirements of modern real-time applications. Reconfigurable hardware platforms such as Field-Programmable Gate Arrays (FPGAs) provide a powerful alternative by enabling architectural customization, intrinsic parallelism, and optimized hardware acceleration. …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 3, Issue 2, 2025 · pp. 11–22 Read article
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Optimizing Image Processing with Verilog on FPGA: Techniques and Performance Enhancements
Abstract: The integration of image processing algorithms into hardware platforms, particularly FPGAs, presents a compelling opportunity for achieving high performance, low latency, and power efficiency in real-time applications. This study focuses on designing and implementing Verilog HDL-based optimal image processing methods for FPGA-based systems. The study explores the development of core algorithms, including edge detection, image enhancement, and adaptive filtering, to maximize resource utilization and processing speed on hardware platforms. Key …
Published in Journal of Semiconductor Devices and Circuits · Vol. 11, Issue 3, 2024 · pp. 46–53 Read article
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Real-Time Object Detection and Tracking in Traffic Surveillance: Implementing Algorithms That Can Process Video Streams for Immediate Traffic Monitoring
Abstract: The rapid growth in urban development and traffic congestion calls for adopting high standards of traffic surveillance systems for monitoring. This paper reviews the current advancement and future trends of real-time object detection and tracking technology and its implications for traffic surveillance. Conventional approaches to traffic monitoring can provide more or less accurate data, but they are not easily scalable and cannot cope with rapidly changing conditions typical within urban …
Published in International Journal of Algorithms Design and Analysis Review · Vol. 3, Issue 1, 2025 · pp. 18–39 Read article
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Tourism Promotion Website Using Three.js
Abstract: A tourism promotion website using Three.js can be built using a JavaScript library to create interactive 3D graphics and animations. The website displays popular tourist destinations in the form of 3D models, allowing users to explore and interact with the models in a virtual environment. The website also includes information about destinations such as Historical context and cultural significance. One of the key features of Three.js is its use of …
Published in Recent Trends in Programming languages · Vol. 10, Issue 2, 2023 · pp. 19–28 Read article
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A Review on Advancement in Automobile Industry: Survey on Driverless Car Technology
Abstract: Autonomous car is used to reduce the human involvement in driving and it will be safer and less expandable. In this paper we are describing how self-driving car will decrease all the risks and cost of driving of vans. In this car there will be no any hardware’s like accelerators, breaks and all it will fully control by sensors and control through sensors in any situations.Keywords: Car control, Hardware Sensors, …
Published in Journal of Advances in Shell Programming · Vol. 6, Issue 2, 2019 · pp. 35–37 Read article
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Reconfigurable AES Based AEAD For Multi-Mode Operation with Lightweight Compatibility
Abstract: The proposal is for a lightweight, multi-mode, reconfigurable authenticated encryption system with associated data (AEADs) based on AES. It is challenging to effectively integrate different AEADs in hardware because each one has its own mode of operation and/or subfunctions, even though some major AEADs share several basic components (such as the XOR-Encryption-XOR (XEX) scheme, block chaining, and advanced encryption standard (AES). This paper proposes hardware that effectively combines the basic …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 3, Issue 1, 2025 · pp. 54–68 Read article
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Intelligent Paradigms in Subsea Connectivity: A Comprehensive Review of Artificial Intelligence in Underwater Communications
Abstract: Underwater wireless communication (UWC) plays a critical role in ocean exploration, environmental monitoring, offshore energy operations, disaster management, and naval defense. However, the underwater environment presents significant communication challenges, including severe signal attenuation, multipath propagation, Doppler effects, limited bandwidth, high latency, and energy constraints. Recent advancements in Artificial Intelligence (AI) and Machine Learning (ML) have emerged as promising solutions to address these limitations and enhance the efficiency, reliability, and adaptability …
Published in Journal of Artificial Intelligence Research & Advances · Vol. 13, Issue 3, 2025 Read article
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A Physics-Informed Graph Neural Network Framework for Real- Time Thermal-Aware Fault Prediction and Adaptive Power Optimization in Heterogeneous System-on-Chip Architectures
Abstract: Heterogeneous System-on-Chip (SoC) architectures are increasingly adopted in edge computing, artificial intelligence, autonomous systems, and high-performance embedded platforms due to their superior computational efficiency and flexibility. However, increasing integration density and workload diversity introduce severe thermal hotspots, accelerated device degradation, and unexpected hardware faults that adversely affect system reliability and energy efficiency. This study proposes a Physics-Informed Graph Neural Network (PI-GNN) framework for real-time thermal- aware fault prediction and adaptive …
Published in Journal of VLSI Design Tools and Technology · Vol. 16, Issue 2, 2026 · pp. 19–28 Read article
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A Machine Vision Approach for Geofence-based Adaptive Friction Modulation in Connected Semi-autonomous Vehicles
Abstract: Safeguarding vulnerable road user (VRU) safety necessitates fail-safes preventing collisions from semi-autonomous vehicles. Geofencing allows service-zones definition but introduces friction discouraging adoption. This paper details an onboard vision model detecting VRUs by helmet status, triggering reactionary neuro-modulations of vehicle maneuverability. The architecture encompasses a YOLOv3 detector determining pedestrian/bicyclist crossing intent through path extrapolations, calibrated using lidar-fusion correcting distance estimates. The subsequent velocity governor adapts acceleration profiles based on predicted exposure …
Published in Journal of Communication Engineering & Systems · Vol. 13, Issue 3, 2023 · pp. 22–29 Read article
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Power and Area - Aware Recursive Multiplier Architecture Utilizing Polymer Composites for Neural Network Acceleration
Abstract: Approximate computing is widely applied in error - tolerant systems as an effective technique to enhance circuit performance by deliberately allowing occasional inaccuracies instead of strictly ensuring precise results for every computation. Among the fundamental building blocks of digital systems, multipliers play a crucial role in signal processing, control systems, and machine learning applications; however, they demand significant power, silicon area, and timing resources. Leveraging error - tolerant approximate multipliers …
Published in Journal of Polymer & Composites · Vol. 14, Issue 1, 2026 · pp. 1320–1337 Read article
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Securing IoT Wilderness with VHDL
Abstract: The Internet of Things (IoT) has revolutionized connectivity by integrating billions of devices and reshaping industries. However, this vast network also brings substantial security concerns. From compromised sensors to hijacked industrial control systems, the vulnerabilities within IoT devices can have far-reaching consequences. Hardware Security Modules (HSMs) provide a reliable and secure environment for performing cryptographic operations and safeguarding sensitive data. This article explores the crucial role of VHDL (VHSIC Hardware …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 3, Issue 1, 2025 · pp. 29–40 Read article
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An Intelligent Complexity-Performance Tradeoff Model of Asynchronous Random Access Protocols in Distributed Edge Computing Using Software Science with Halstead
Abstract: The paradigm shift towards Distributed Edge Computing (DEC) has changed the entire world of the Internet of Things (IoT) connectivity to its core and has spawned the need to implement robust Asynchronous Random Access (ARA) protocols to deal with the contention between a huge range of diverse devices that are constrained by their resources. While there is now extensive optimization of these protocols in contemporary research for channel efficiency (throughput, …
Published in Journal of Software Engineering Tools & Technology Trends · Vol. 13, Issue 2, 2026 Read article
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Accelerating High Arithmetic Intensity Storm Surge Model using CUDA
Abstract: GPUs (Graphic Processing Units) have opened the floodgates for high-performance computing, especially for programs that involve high-level arithmetic computations. Though parallel computing capability has been around for many years, it requires large and expensive hardware resources in the form of supercomputers. Presently, GPUs are found in all computing devices due to their reasonable prices. GPUs are now being tapped for speeding up legacy codes, especially in FORTRAN that involves high …
Published in Recent Trends in Parallel Computing · Vol. 3, Issue 2, 2016 · pp. 9–21 Read article
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FPGA Implementation of SoC Design using Softcore Processor and Custom Peripherals, Custom Instruction for Robotics and Automation
Abstract: The general definition of SoC is the on-chip integration of a variety of functional h/w blocks to suite a specific product application. In traditional technology designed using on board integration of functional blocks for any application, this leads to less performance. Nowadays productivity gap will be reduce by making compact, life of device and Time to market. So using FPGA demonstrating building of SoC using custom peripherals. FPGA (Field Programmable …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 1, Issue 3, 2013 · pp. 10–16 Read article
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Study And Literature Analysis of The Coarse-Grained Logic Interface with Floating-Point Arithmetic Unit
Abstract: Field-Programmable Gate Arrays (FPGAs) have become an essential digital circuit implementation techni que. The research looks at the design parameters by evaluating the building of an arithmetic logic unit (ALU) in Xilinx Vivado utilizing Hardware Description Language (HDL) and implementing common Field Programmable gate arrays (FPGAs). The ALU is a logic design component in digital computers that seeks to deliver optimal algorithms to maximize the usage of available hardware. The …
Published in Journal of VLSI Design Tools and Technology · Vol. 13, Issue 2, 2023 · pp. 45–55 Read article
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Autonomous Utility Bot with Self Balancing and Obstacle Avoidance
Abstract: Over the last decade, there has been a surge in global interest in two-wheeled self-balancing robot research. The kinematics model of a two-wheeled self-balancing autonomous mobile robot is described in this paper. After the mechatronics system design for the robot is completed, the analysis of the entire kinematics model can be divided into two wheels and a body. The velocity decompositions of the robot wheel and body are then examined. …
Published in Recent Trends in Sensor Research & Technology · Vol. 9, Issue 2, 2022 · pp. 18–24 Read article
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Design and Optimization of Domain-Specific Languages for High-Performance Computing Applications
Abstract: The accelerating demand for computational power in scientific, engineering, and data-intensive domains has driven high-performance computing (HPC) systems toward unprecedented levels of parallelism and architectural complexity. Contemporary HPC platforms integrate multicore CPUs, many-core GPUs, accelerators, and deep memory hierarchies, creating significant challenges for software development and performance optimization. Traditional general-purpose programming languages and parallel programming frameworks provide low-level control over hardware resources but require extensive manual tuning, resulting in poor …
Published in Recent Trends in Parallel Computing · Vol. 13, Issue 1, 2026 · pp. 17–22 Read article
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Flying Drone Using KK Flight Controller
Abstract: This paper presents the design, development, and testing of a quadcopter drone using the KK2.1.5 flight controller, with an emphasis on stability and educational value. The KK2.1.5 controller features are inbuilt LCD screen, inbuilt programming, enabling direct configuration and tuning without the need for a computer interface, which makes it highly suitable for beginners and students. The drone is built using a modular frame architecture, which allows for easy replacement …
Published in International Journal of Advanced Control and System Engineering · Vol. 3, Issue 2, 2025 · pp. 20–25 Read article