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1205 articles for “over speeding”
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Effects of Rice Husk Waste on Mechanical Properties of Rubber-Based Speed Bumps
Abstract: In this work, rice husk used as filler has been added to a rubber batch which is used in the manufacturing of rubber speed bumps. The prepared batch was consisted of the reclaim as by-product or as undesirable material. The work completed in one of Iraqi manufacturing of tires. The mechanical properties of the new compositions have been measured for different loadings in the matrix in order to prove the …
Published in Journal of Thin Films, Coating Science Technology & Application · Vol. 7, Issue 3, 2020 · pp. 1–8 Read article
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E-Shaped Microstrip Patch Antenna for High Speed Wireless Local Area Network (WLAN) Applications
Abstract: A microstrip antenna consisting of E-shape radiating patch having low profile, probe-fed is designed and proposed for wireless local area networks (WLAN) applications. All countries use different WLAN, as the antennas available are not able to cover all the standards. This study aims to design a smallest antenna with better polarization covering all high speed WLAN standards ranging from 4.47 to 5.82 GHz. The patch antenna designed on low cost …
Published in Journal of Telecommunication, Switching Systems and Networks · Vol. 4, Issue 1, 2017 · pp. 1–5 Read article
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Low Power High Speed Eight-Transistor (8T) SRAM Cell with Enhanced Data Stability
Abstract: The demand of static random access memory cell in embedded memories is rapidly increasing. To design SRAM is continuously becoming difficult due to limitation of weaker write margin, degraded data stability and higher leakage power consumption. In order to overcome these limitations, new 8T SRAM has been explored. The simulation results depicts better data stability, low access delay and decreased leakage power consumption. Alternatively, proposed cell with sleep transistor and …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 35–44 Read article
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High Speed Low Offset Power Efficient Fully Differential Double Tail Dynamic Comparator
Abstract: This paper comprises a novel fully differential double tail high performance comparators suitable for low-voltage low-power applications. A fully differential double tail comparator has been designed to meet the requirement of high speed, low power consumption with low offset voltage. Authors have proposed novel architecture of dynamic voltage comparator which is differential and double tail and verified the architecture by simulation in TSMC 180nm technology with ±0.9V supply. The proposed …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 1, 2018 · pp. 7–16 Read article
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A Time Domain Analysis on Chip High Speed VLSI Optical Interconnection Network
Abstract: Intrachip optical interconnects (OIs) have the potential to outperform electrical wires and to ultimately, solve the communication problem, and to obtain high-performance integrated circuits. In this study, the International Technology Roadmap for Semiconductors (ITRS) is used as a reference to fulfill the requirements of silicon-based ICs must satisfy to successfully perform copper electrical interconnects (IEs). Keywords: Integrated optoelectronic circuits, optoelectronics, optical interconnects (ICs), silicon photonicsCite this ArticleAbhishek Sharma, Sudhir Kumar …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 3, 2018 · pp. 36–44 Read article
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A New High Speed Low Power 1 Bit Full Adder
Abstract: This paper proposes a low power, low area and high speed 1-bit full adder compared to earlier 1bit full adder designs. The adder comprises of eight transistors with some modifications over the other existing design, so that it can invariably be used in the device with least nano device dimensions. The proposed design exhibits lower threshold loss and works faithfully in sub-threshold regime with appreciable voltage swing at lower power …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 1, 2013 · pp. 8–13 Read article
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High-speed CMOS ADCs Design
Abstract: This paper presents the design of high-speed subranging and flash analog to digital data converters (ADC) including the design of efficient operational amplifier to meet the performance requirements of these data converters for the specifications laid down targeted to the SCL 1.2 μm CMOS Foundry. The design starts from the specification of the circuit, its theoretical analysis for the parameter estimations of the transistors as well as the circuit’s design. …
Published in Journal of VLSI Design Tools and Technology · Vol. 2, Issue 1-2-3, 2012 · pp. 59–74 Read article
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Time Domain Analysis in an On-chip High Speed RLCG Interconnection Network at 0.18 µm Technology
Abstract: In this model, the time domain waveform is evaluated for calculation of delay time, peak time, settling time, damping ratio and natural frequency for a second order RLCG interconnect network. It can also be used for multiple interconnect systems but for higher order systems it is ignored due to accurate analysis. The model is applied to a single resistance-inductance-capacitance-conductance model which can also be extended to multi-interconnect systems to analyze …
Published in Journal of VLSI Design Tools and Technology · Vol. 1, Issue 1-2-3, 2011 · pp. 57–67 Read article
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Dynamic Comparators for Very High-Speed ADC’s
Abstract: The need for ultra- low power and space economical analog –to- digital converters (ADCs) is pushing towards the utilization of low voltage CMOS dynamic comparators to maximise the facility potency and speed. the traditional dynamic comparators have options like high input ohmic resistance, no static power dissipation and sensible strength against noise and couple. the downside is that giant numbers of transistors are accustomed minimize the offset, therefore the speed …
Published in Recent Trends in Fluid Mechanics · Vol. 8, Issue 3, 2021 · pp. 32–45 Read article
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Some Investigations with Ultra High Speed Low Power All Optical digital Logic Gates
Abstract: AbstractThis paper illustrates design for an all-optical optical inverter and universal digital logic NAND gate using NRZ format, realized by MZI structure. Miscellaneous evaluations have been done to examine the designs performance in terms of their generated output waveforms. Simulations have been done for significant design parameters as chirp factor, laser power and bit error rate at different data-rates. Optical Logical gate outputs have been verified. It showed good design …
Published in Trends in Opto-electro & Optical Communication · Vol. 8, Issue 3, 2018 · pp. 17–30 Read article
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DC Motor Controller by PWM Technique
Abstract: Abstract: This project is expected to control the speed of a DC (Direct Current) engine using PWM (pulse-width-modulation) control with the 8051 plan microcontroller. The speed of the DC engine is explicitly relating to the voltage associated over its way, in case the voltage over the engine terminal is moved, at that point the speed can be changed. This venture uses the above rule to control the speed of the …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 7, Issue 3, 2019 · pp. 1–4 Read article
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Area and Speed Efficient Floating Arithmetic Logic Unit Implementation on Hybrid FPGAS
Abstract: Proposed design of an Area and Speed optimized field arithmetic logic unit (FALU) for modern computing of advanced processors, as we are aware that in most of the DSP (Digital Signal Processors) FALU is a critical component for continuous calculation of signs and ongoing information to meet the constant situation of sign handling it is exceptionally needed to make calculation quicker as could be expected so we have thought of …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 9, Issue 3, 2021 · pp. 29–34 Read article
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Automated Headlight Intensity Controller and Speed Control in Vehicles
Abstract: AbstractHeadlight intensity of vehicles poses a great danger during night travel. The drivers of most vehicles use high bright beam while driving at night. This causes inconvenience for the person travelling from the opposite direction. Person experiences a sudden blaze for a short duration. When these headlights shine brightly, they cause a temporary blindness to a person, resulting in road accident during night. To avoid such incidents, we are designing …
Published in Journal Of Network security · Vol. 7, Issue 2, 2019 · pp. 1–5 Read article
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Design and Simulation of Low-power, High-speed Effective Area Mux Based One-bit Full Adder Using CMOS Technology
Abstract: Our findings reveal a novel kind of circuit capable of performing both XOR and XNOR operations in parallel. Power dissipation and delay are both greatly reduced in the proposed circuits due to their low output capacitance as well as minimal short-circuit power dissipation. We show six new hybrid 1-bit full-adder (FA) circuits that take use of the XOR-XNOR or XOR/XNOR gates' special full-swing function. Each potential circuit layout has both …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 1, 2023 · pp. 25–33 Read article
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Design and Implementation of High-Speed Low Power Low Area Hybrid One Bit Full Adder Using CMOS Technology
Abstract: In this article, we'll take a look at a new kind of Full Adder (FA) design that mixes traditional Complementary Metal Oxide Semiconductors (CCMOS) with Pass Transistors (PTs) and Transmission Gates (TGs). To analyze the circuit's performance, we used the Mentor Graphics software package. Since all twenty (20) varieties of Full Adder circuits were able to be measured and compared, this research was conducted. When the clock rate of the …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 2, 2023 · pp. 29–39 Read article
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ATM Network: A High-speed Communication Network
Abstract: Next-generation computers and communications will use asynchronous transfer mode (ATM). ATM networks employ compact, predetermined cells for message transmission, enabling them to efficiently utilize the same network for transmitting voice, video, and data across extensive distances. Most computer and telecommunications companies focus on ATM products and services. The building can also manage different and regular costs. Therefore, it is suitable for many vehicle types and has end-to-end encryption. ATM uses …
Published in Journal Of Network security · Vol. 12, Issue 2, 2024 · pp. 34–39 Read article
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Delay Analysis of HS-14T 45nm CMOS SRAM with Different SRAM Techniques for Improvement in Speed
Abstract: This paper presents a novel HS-14T design aimed at significantly improving read and write delays compared to conventional 6T and other memory cells RHRD-12T, SEUH-12T, and NHRC-14T. As technology scales, the demand for faster and more stable memory cells becomes increasingly critical. Our proposed HS-14T incorporates additional transistors to enhance stability and reduce access times, resulting in notable performance gains. Comprehensive simulations reveal that the HS-14T SRAM cell substantially reduces …
Published in Journal of VLSI Design Tools and Technology · Vol. 14, Issue 2, 2024 · pp. 1–13 Read article
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Hybrid Additive-Subtractive Manufacturing of Multi-Material Functionally Graded Components: Integration of Laser Powder Bed Fusion with High-Speed CNC Finishing for Aerospace Applications
Abstract: The synergy involved in the merging of additive and subtractive manufacturing technologies is the game changer to generate multi-material functionally graded components to be used in the aerospace industries. The paper is an in-depth review of a proposed hybrid additive-subtractive manufacturing, which synergistically merges laser powder bed fusion (LPBF) fashioning with rapid computer numerical control finishing production processes. The multi-material deposition, thermal issues, and optimization of post-processing are the challenges …
Published in Journal of Polymer & Composites · Vol. 14, Issue 2, 2026 · pp. 398–418 Read article
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Traversal Speed Comparison of BFS and DFS in Balanced and Skewed Binary Trees
Abstract: In this paper, we provide an analysis of how well both breadth-first search (BFS) and depth-first search (DFS) algorithms perform while wandering through two kinds of binary trees: balanced and skewed. The research was motivated by the practical application of storing files and directories in a certain type of parent-child relationship through the use of hierarchical file systems (e.g., windows explorer). The result of measuring how fast and versatilely these …
Published in International Journal of Data Structure Studies · Vol. 4, Issue 2, 2026 Read article
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Application of Wavelet De-noising for Wind Speed Retrieval from a 2.5 MHz Partial Reflection Radar
Abstract: Atmospheric studies related to middle-atmospheric coupling, climate monitoring, steering profiles for expendable launch vehicles and re-entry missions require atmospheric wind profiles as an important input. Atmospheric wind profiling is conventionally carried out using rawinsondes and radiosondes flown in high altitude balloons, complemented by sounding rockets and ground-based radars. The partial reflection radar (PRR) can be effectively used for the same purpose to an altitude of about 100 km. But deriving …
Published in Current Trends in Signal Processing · Vol. 3, Issue 2, 2013 · pp. 1–8 Read article