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61 articles for “Threshold voltage”
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A Two-Dimensional (2D) Analytical Model for Channel Potential and Threshold Voltage of Short Channel Triple Material Gate-Double Halo (TMG-DH) DG MOSFET
Abstract: In the present paper, an analytical model for the channel potential of short channel Triple Material Gate-Double Halo (TMG-DH) DG MOSFET has been presented using parabolic approximation method. Further, the threshold voltage of the device has been calculated using minimum mid channel potential and the result obtained has been compared with the threshold voltage of Triple Material double gate (TMDG) MOSFET in order to show the improvement in the threshold …
Published in Journal of Microelectronics and Solid State Devices · Vol. 6, Issue 2, 2019 · pp. 13–25 Read article
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Effect of Various Parameters on Threshold Voltage of Virtually Fabricated Lightly Doped PMOS Device
Abstract: This paper emphasis on the design, fabrication and analysis of 45 nm P type MOSFET device using SILVACO TCAD tool. The analysis was based on variation of various parameters like oxide thickness, threshold implant and halo implant (pockets) to analyze the threshold voltage. The drain versus gate and drain versus gate plots are being plotted using tony-plot. It has been observed that as the thickness of the oxide increases, threshold …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 13–20 Read article
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Effect of Various Parameters on Threshold Voltage of Virtually Fabricated Lightly Doped PMOS Device
Abstract: This paper emphasis on the design, fabrication and analysis of 45 nm P type MOSFET device using SILVACO TCAD tool. The analysis was based on variation of various parameters like oxide thickness, threshold implant and halo implant (pockets) to analyze the threshold voltage. The drain versus gate and drain versus gate plots are being plotted using tony-plot. It has been observed that as the thickness of the oxide increases, threshold …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 2, 2017 · pp. 13–20 Read article
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A New Sub-1 Volt Reference for Low Voltage Application Based on MOSFET’s Threshold Voltage Extractor
Abstract: A CMOS voltage reference circuit featuring MOS transistors threshold voltage extractor has been developed. The circuit implemented using 0.35µm CMOS AMS process generates a reference of 574 mV for a power supply of 3.3V with 726µW power consumption. The circuit presents a variation of 43 ppm/ºC for the –10 to –110ºC temperature, and 18.6 dB PSRR at 1 KHz. A vital analytical approach is presented to provide a universal design …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 1, 2013 · pp. 14–19 Read article
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Simulation of Threshold Voltage Variation of Enhancement Mode n-channel MOSFET
Abstract: AbstractThe paper focuses on simulation of variation of threshold voltage as a function of effective channel length of the short-channel MOSFETs with a Gaussian-like doping profile. An investigation of short channel effect (SCE) in deep submicron region has been carried out. The validity of the proposed simulation is shown by comparing the results with the numerical calculation and simulation of data obtained by using the commercially available simulation software. Finally, …
Published in Journal of Semiconductor Devices and Circuits · Vol. 4, Issue 2, 2017 · pp. 34–40 Read article
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Performance Analysis of Bootstrapping Techniques to Overcome the Threshold Voltage Drop in NMOS Logic Design
Abstract: Abstract: In this paper, we study the concept of bootstrapping techniques and analyzed its performance in digital CMOS circuits. These bootstrapping circuits are used to increase the gate voltage of transistors so that drain node voltage can be pulled high to overcome the threshold voltage drop problem in NMOS logic design. Also discuss the drawback associated with voltage bootstrapping techniques in NMOS logic design that is sneak path problem between …
Published in Journal of Semiconductor Devices and Circuits · Vol. 6, Issue 1, 2019 · pp. 15–20 Read article
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Study of Scaling of MOSFET on Various Electrical Characteristics using Silvaco TCAD Tool
Abstract: MOSFETs are the driving work horse of semiconductor industry. Over the years, the MOSFET device density has been continuously increasing owing to the reduction in channel length of MOSFET device. This article discusses the effect of scaling i.e. channel length and gate oxide thickness on various parameters like threshold voltage, transconductance, maximum drain current and subthreshold slope. It is important to consider that with scaling of the channel length; the …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 1, 2018 · pp. 11–19 Read article
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Study the Effect of Applied Gate Voltage on Threshold Potential and Carrier Transport Behavior of Three-Terminal Novel Prototype Device having Configuration P-type Si/SiO2/CuFeS2/Al
Abstract: This study presents a trial approach for the fabrication and characterization of a novel p-Si/SiO₂/CuFeS₂/Al field-dependent three-terminal electronic device designed to investigate charge transport behavior across multiple semiconductor junctions under externally applied bias voltages. The proposed prototype incorporates CuFeS₂ (chalcopyrite) as the active semiconductor layer, marking its first reported application in a field-induced electronic device architecture. The device was fabricated using a layered heterostructure consisting of p-type silicon, a silicon …
Published in International Journal of Crystalline Materials · Vol. 3, Issue 2, 2026 · pp. 1–7 Read article
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Analysis of DIBL Effect in MOSFET Working
Abstract: AbstractOne of the most widely used electronic devices, particularly in digital integrated circuits, is the metal insulator semiconductor (MIS) transistor. Most of the existing transistors used in fabrication of integrated chips are with junctions. The device scaling is growing the channel length between junctions in devices are scaling gone down to 10 nm. Drain Induced Barrier Lowering (DIBL) effect is prominent as the feature size of MOS device keep diminishing. …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 3, 2018 · pp. 33–40 Read article
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A Novel Design for Power Reduction in Arithmetic Circuits using MTCMOS Technology
Abstract: In CMOS logic circuits, the reduction in the threshold voltage due to voltage scaling leads to increase in the subthreshold leakage current and hence static power dissipation. Although power consumption is important for modern VLSI design, operation speed and occupied area are still the main requirements of the VLSI design. Multi threshold voltage CMOS (MTCMOS) technology is a good solution which provides a high performance and low-power design without any …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 1, 2014 · pp. 1–7 Read article
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Design of Energy Efficient Clock System
Abstract: Energy efficiency is a key metric for energy constrained Ultra Low Power (ULP) VLSI applications such as wireless sensor nodes, pace makers, hearing aids etc. These applications need clock system in their signal processing and communication sub-system. Moreover, clock system plays a vital role in governing the reliability, power consumption and performance of synchronous system. In today’s era of portable electronics, power consumption has emerged as a forefront design metrics. …
Published in Journal of VLSI Design Tools and Technology · Vol. 9, Issue 2, 2019 · pp. 1–7 Read article
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Effect of Thickness in Electroluminescence Spectra on 2-5 Dialoxy-PPV (ROPPV) Films
Abstract: The optical properties and electroluminescence (EL) of ROPPV (2-5-dialoxy-PPV) films of various thicknesses have been studied. The thickness of ROPPV layer on glass slide was measured by Fizeau fringes interferometric technique which varied from 200 to 400 nm. The absorption spectra show that the absorption occurred only in ultraviolet region. Thick films show only one peak at 310 nm, whereas by decreasing the thickness, the peaks are obtained at lower …
Published in Journal of Thin Films, Coating Science Technology & Application · Vol. 2, Issue 1, 2015 · pp. 4–9 Read article
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Implementation of Low Power Shift Registers Using Multi-Threshold CMOS Technique
Abstract: This paper enumerates the design of low power shift registers using dual-edge triggered flip-flop (DETFF). In the conventional shift registers, high leakage current is becoming a significant contributor to power dissipation. In order to overcome this problem, the multi-threshold complementary metal oxide semiconductor (MTCMOS) technology is used for leakage minimization in proposed designs. This technology features both low-threshold and high-threshold voltage MOSFETs. High-threshold voltage MOSFETs reduced the standby leakage current …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 2, 2016 · pp. 53–61 Read article
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Analysis and Characterization of Circuits for Leakage Power Reduction at Sub-50 nm in CMOS Circuits
Abstract: This paper analyzes various techniques to decrease leakage power in complementary metal oxide semiconductor (CMOS) very large scale integration (VLSI) circuits, because due to continuous scaling of CMOS technology there is improvement in speed of semiconductor devices and the side effect of this scaling is leakage power. With the development of technology in CMOS VLSI Circuit, length of transistors has been reduced and speed of operation is increasing simultaneously. As …
Published in Journal of Electronic Design Technology · Vol. 13, Issue 2, 2022 · pp. 11–22 Read article
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Design of Low Power Resistor Less Flash ADC for UWB Receiver Applications
Abstract: In this paper, two designs of flash analog to digital converters (ADCs) based on threshold inverter quantization (TIQ) technique are presented. The parallel threshold inverter quantization (PTIQ) flash ADC exploits the advantage of reduction in capacitance and power consumption if the transistors are placed in parallel. Another design called low voltage tunable body bias (LVTBB) PTIQ ADC operates at near threshold voltage level to minimize the power consumption. The PTIQ …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 3, 2016 · pp. 71–87 Read article
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Influence of Dielectric and Active layer Thickness on MgZnO Thin Film Transistor Electrical Characteristics
Abstract: From last decades, Thin Film Transistors Technology uses low-k dielectric material as an insulator. Insulator thickness plays an important role in device dimension. The insulating layer also known as the gate oxide separates the gate electrode from the channel region of the transistor. If the insulating layer is too thin, there is a greater chance that electrons can tunnel through the oxide layer, leading to leakage current. To mitigate this …
Published in Journal of Polymer & Composites · Vol. 11, Issue 5, 2023 · pp. 17–26 Read article
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Design and Analysis of Source Current Effect on Preamplifier-Positive Feedback-based CMOS Comparator Using 90 nm Technology
Abstract: One of the most important and essential components of the data converter circuit is the comparator and this paper presents the implementation and characterization of the basic and simplest CMOS comparator in 90 nm technology. Once the technology scales down, the design and implementation becomes an essential issue at sub-micron and deep-sub-micron technology. The behavior of the threshold voltage in the CMOS is not a linear quantity when the parameters …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 3, 2013 Read article
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Modeling and Simulation of Pentacene based Organic Thin Film Transistors with Organic Gate Dielectrics
Abstract: AbstractTwo structures of pentacene organic thin film transistors (OTFT) with organic dielectrics, polymethyl methacrylate (PMMA) and polyvinyl alcohol (PVA) have been numerically simulated with TCAD ATLAS tool. Output and transfer characteristics were simulated and mobility, threshold voltage, sub threshold swing (SS) and current on/off ratio that play a part in the increment of conductivity of device were extracted. The authors show that the semiconductor-insulator interface actively affects the performance of …
Published in Journal of Microelectronics and Solid State Devices · Vol. 4, Issue 3, 2017 · pp. 13–18 Read article
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Simulation Study of Process Variations in Double Gate Junctionless Field-Effect Transistors
Abstract: This work discusses the process variations in symmetrical double-gate (DG) junctionless (JL) field-effect transistors (FETs) by device simulation. Output I-V characteristics along with subthreshold slope increase, DIBL variations with drain voltage and threshold voltage shift variations are systematically analyzed with the general variability issues including oxide thickness, channel thickness and doping concentration. Potential distribution in the body channel region is also analyzed. Optimum values of the variability factors are considered …
Published in Journal of Semiconductor Devices and Circuits · Vol. 2, Issue 2, 2015 · pp. 18–27 Read article
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Comparative Analysis of Class-AB Voltage Follower using DTMOS Transistor
Abstract: This paper describes a topology of voltage follower Class-AB Voltage Follower like Translinear voltage follower using MOS and DTMOS Transistor. The circuits are simulated in 90 nm technology. The results are used to compare the performance of the above voltage followers. All analysis was supported by the simulation results. The analysis are made in terms of gain, bandwidth and transient response using ELDO spice, IC station and Design architect of …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 2, 2015 · pp. 64–70 Read article