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30 articles for “power dissipation”
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Design and Implementation of Low Power and Area Efficient Sub Threshold Level Shifter Using 16 nm CMOS Technology
Abstract: An efficient method of modifying subthreshold voltages is proposed here. As an alternative to static power dissipation, the suggested design allows for charging of internal nodes through VDDH. The force of the pull-down mechanism may be increased by connecting a second auxiliary circuit. The transition energy for input frequencies between 1 and 5 MHz is 84 fJ, the propagation delay is 46 ns, the dynamic power dissipation is 0.3 mW, …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 1, 2023 · pp. 16–24 Read article
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An Efficient Counter Using Modified Upper and Lower SVL Techniques and TSPCL
Abstract: Low power VLSI has emerged as the fundamental building block of the modern electronic era. This leads to a substantial paradigm shift where both power dissipation, performance and area of utmost importance. In the earlier time of fabrication, power dissipation was mainly neglected due to low device density and low operating frequency needed for computation. But in modern technological era, the need for high device density, higher operating frequency, proliferation …
Published in Research & Reviews : Journal of Physics · Vol. 13, Issue 2, 2024 · pp. 37–43 Read article
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Design of Decoder Using Domino Logic Circuit for VLSI
Abstract: Dissipation of power from a circuit is the major issue in the design of any VLSI circuit, which decreases the life span of a device/system. NMOS and PMOS circuits are very slow while switching the state from low to high. The speed of the circuit can be increased by decreasing resistance. This process in turn increases the static power dissipation. So, because of these disadvantages, CMOS circuits are used in …
Published in Journal of VLSI Design Tools and Technology Read article
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Monitoring eddy current density fluctuation and power management in doped Al 2 O 3
Abstract: Al2O3 nanowire presents fascinating electrical properties which span from insulating (dielectric) to superconducting. A model is designed to describe the Phenomenon of eddy electric current and eddy current density fluctuation. Ohmic type theorem is developed using the modified Green – Kubo theorem. With little modification Green-Kubo theorem is incorporated to explain the relationship between eddy current density, electric field, and electric conductivity. Then factor contributing eddy current density fluctuations are …
Published in Nano Trends – A Journal of Nano Technology & Its Applications · Vol. 26, Issue 1, 2024 · pp. 35–45 Read article
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Design and Simulation of Low-power, High-speed Effective Area Mux Based One-bit Full Adder Using CMOS Technology
Abstract: Our findings reveal a novel kind of circuit capable of performing both XOR and XNOR operations in parallel. Power dissipation and delay are both greatly reduced in the proposed circuits due to their low output capacitance as well as minimal short-circuit power dissipation. We show six new hybrid 1-bit full-adder (FA) circuits that take use of the XOR-XNOR or XOR/XNOR gates' special full-swing function. Each potential circuit layout has both …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 1, 2023 · pp. 25–33 Read article
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Thermally Adaptive Bio-Inspired VLSI Interconnect Model for Next-Generation Embedded Systems
Abstract: The increasing complexity of next-generation embedded systems has intensified the challenges associated with power dissipation, thermal instability, signal integrity, and interconnect reliability in Very Large- Scale Integration (VLSI) architectures. This research proposes a thermally adaptive bio-inspired VLSI interconnect model designed to enhance communication efficiency and thermal resilience in advanced embedded platforms. The proposed model integrates bio-inspired adaptive routing principles with dynamic thermal-aware interconnect management to optimize data transmission under varying …
Published in Journal of VLSI Design Tools and Technology · Vol. 16, Issue 2, 2026 Read article
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Spintronic Logic Device Modeling and Energy Optimization for Beyond-CMOS Computing Systems
Abstract: The continuous scaling limitations of conventional CMOS technology have accelerated the exploration of alternative computing paradigms for next-generation low-power and high-performance systems. Spintronic logic devices have emerged as a promising solution due to their non-volatility, ultra-low switching energy, high integration density, and compatibility with beyond-CMOS architectures. This research presents a comprehensive modeling and energy optimization framework for spintronic logic devices applied in beyond- CMOS computing systems. The proposed work investigates …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 4, Issue 1, 2026 Read article
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A Majority Function Based Full Subtractor
Abstract: In the present landscape of very large-scale integration (VLSI) technology, the imperative to implement Boolean functions with minimal gate count remains a cornerstone of efficient circuit design. This pursuit has only grown more critical with the evolution of low-power design strategies, which now offer significantly enhanced benefits compared to traditional approaches. The trifecta of performance, affordability, and dependability continue to drive innovation in this field, shaping the trajectory of technological …
Published in Research & Reviews : Journal of Physics · Vol. 13, Issue 2, 2024 · pp. 8–14 Read article
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The Role of Majority Functions in Enhancing Full Subtractor Performance in High-Density Logic Circuits
Abstract: In the present trend of very large-scale integration (VLSI) technology, implementing a Boolean function with the fewest number of gates (logic) has always been important. Low power design strategies now provide much more benefits than in the past. Performance, affordability, and dependability may be key issues in this area of technology design. Power dissipation is now recognized as a crucial component in the development of competitive market areas such wireless …
Published in Journal of Semiconductor Devices and Circuits · Vol. 11, Issue 2, 2024 Read article
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High Performance Multi-Valued Logic (MVL)Gate Design Using FinFET
Abstract: CMOS scaling faces challenges such as leakage, power dissipation, and short channel effects. Multi-Valued Logic (MVL) offers higher information density and reduced interconnections. This work presents a FinFET-based MVL gate design that improves electrostatic control, switching speed, and reliability. Simulation results confirm reduced leakage power and enhanced performance compared to conventional logic. The proposed architecture demonstrates scalability for advanced technology nodes. It also shows potential for low-power applications in portable …
Published in Journal of Microelectronics and Solid State Devices · Vol. 13, Issue 1, 2026 · pp. 34–45 Read article
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Implementation of Adders Using Ternary Based Multiple Valued Logic
Abstract: In today’s world VLSI chips are widely used in various branches of Engineering like Voice and Data communication networks, Digital signal processing, Computers, Commercial Electronics, Automobiles, Medicine and many more. So, there have been major advances in IC technology which have both made feasible and generated great interest in electronic circuits which employ more than two discrete levels of signals such circuits called Multiple valued logic circuits, offer several potential …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 2, 2023 · pp. 1–8 Read article
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Development of Polymer Based SRAM Cell with Enhance Low Power Performance
Abstract: Low-power memory technologies are in high demand with the rapid growth of portable electronics and energy-efficient computing systems. Static random-access memory (SRAM) plays a crucial role in processors, cache memories, and system-on-chip applications due to their speed and reliability. Static Random Access Memory (SRAM) is typically implemented using complementary MOS (CMOS) technology, which integrates both PMOS (P-channel Metal–Oxide–Semiconductor) and NMOS (N-channel Metal–Oxide–Semiconductor) transistors. However, as technology scales to deep submicron …
Published in Journal of Polymer & Composites · Vol. 14, Issue 1, 2026 · pp. 1439–1448 Read article
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Performance Comparison of Noise-Tolerant, High- Performance CMOS Domino Logic Configurations
Abstract: In high-performance VLSI chip design, domino logic configuration is often preferred over static logic due to its faster operation and smaller area footprint, especially in deep submicron (DSM) technology. However, DSM noise has become a significant challenge in domino-based circuits, leading to compromises in the reliability and signal integrity of integrated circuits (ICs). The switching threshold of domino logic, defined as the input voltage level at which the gate output …
Published in Journal of Semiconductor Devices and Circuits · Vol. 12, Issue 2, 2025 · pp. 35–50 Read article
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Deep Learning-Based Thermal Prediction Models for Solid-State Electronic Devices
Abstract: The rapid advancement of solid-state electronic devices in high-performance computing, communication systems, automotive electronics, and renewable energy applications has significantly increased concerns related to thermal management and device reliability. Excessive heat generation in semiconductor devices adversely affects operational efficiency, switching performance, lifespan, and overall system stability. Traditional thermal prediction methods often require complex numerical computations and extensive simulation time, making them less suitable for real-time monitoring and adaptive control applications. …
Published in International Journal of Solid State Innovations & Research · Vol. 4, Issue 1, 2026 Read article
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Photonic-Assisted Spintronic Solid-State Switching Model for High-Speed Memory Devices
Abstract: The rapid advancement of high-speed computing and data-centric applications has intensified the demand for energy-efficient and ultra-fast memory technologies. This paper proposes a Photonic-Assisted Spintronic Solid-State Switching Model for next-generation high-speed memory devices. The proposed framework integrates photonic excitation mechanisms with spintronic switching dynamics to enhance data transfer speed, minimize switching delay, and reduce power dissipation in solid-state memory architectures. By combining optical pulse-assisted spin polarization with magnetic tunnel junction-based …
Published in International Journal of Solid State Innovations & Research · Vol. 4, Issue 1, 2026 Read article
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RTL-to-GDS Implementation of a High-Speed On-Chip 32:1 Serializer Using Open-Source Tools
Abstract: Exploring the RTL-to-GDS implementation of a high-speed on-chip 32:1 serializer, this study investigates the integration of open-source tools within VLSI design, emphasizing sustainable practices in the semiconductor industry while operating at the nanometer scale. Addressing methodologies for optimizing power consumption and chip area utilization, particularly focusing on efficient use of non-renewable resources. The study is set against the backdrop of advanced 7nm FinFET technology, critical for enabling efficient data transmission …
Published in Journal of VLSI Design Tools and Technology · Vol. 14, Issue 3, 2024 · pp. 1–10 Read article
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The Next Era of Solid-State Innovation: Beyond Silicon
Abstract: The semiconductor industry is getting close to the physical and economic boundaries of silicon-based technology. A new era of solid-state innovation is beginning. Beyond Silicon: The Next Era of Solid-State Innovation looks at the materials, device layouts, and manufacturing methods that are about to change the way electronics and energy work. The article talks about improvements in wide- and ultra-wide-bandgap semiconductors, two- dimensional materials, and quantum and neuromorphic systems that …
Published in International Journal of Solid State Innovations & Research · Vol. 3, Issue 2, 2025 · pp. 19–23 Read article
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VLSI – Power, Expansion and Versatility
Abstract: The evolution of Very Large-Scale Integration (VLSI) technology has significantly transformed the landscape of modern electronics, driving innovations across diverse industries. This article explores the key attributes of VLSI, focusing on its power, expansion, and versatility. VLSI's power lies in its ability to integrate thousands to millions of transistors on a single chip, enabling the development of high-performance, energy-efficient devices. The expansion of VLSI technology is exemplified by its application …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 3, Issue 1, 2025 · pp. 1–8 Read article
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Advancements and Challenges in Computer Hardware Technology Management: Innovations, Performance, and Future Directions
Abstract: Modern computing systems depend on computer hardware technology for performance, efficiency, and innovation. Processing units, memory storage, input/output devices, and networking hardware are covered in this article. It emphasizes how multi-core processors, SSDs, and integrated circuits have increased computational power and speed. The essay also discusses quantum computing, edge computing, and the IoT, which will change hardware. Finally, the essay discusses hardware design challenges such power consumption, heat control, and …
Published in International Journal of Solid State Innovations & Research · Vol. 3, Issue 1, 2025 · pp. 1–8 Read article
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Captive Energy Generation by Using Gym Equipment
Abstract: This project aims to create a sustainable energy source by converting exercise equipment into devices capable of generating electrical power. Traditionally, the mechanical energy produced during workouts is wasted as it dissipates within exercise machines. This project aims to capture and convert that otherwise unused energy into usable electricity. By integrating an alternator-based system into fitness equipment, the mechanical motion generated by users during exercise can be transformed into electrical …
Published in Journal of Microwave Engineering and Technologies · Vol. 12, Issue 3, 2025 · pp. 21–26 Read article