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27 articles for “pass gate”
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Logic Optimization Algorithm based on Shannon’s Expansion: Reduction in Area, Power and Delay for Pass Gate Implementation
Abstract: The reduction in hardware requirement for any application does not only guarantee the reduction of chip area but also significantly reduces the corresponding power consumption and delays. Hence, any heuristic used to reduce the hardware requirement for given logic is always well justified. In this paper, the number of pass gates required to implement the given Boolean Logic is reduced by sizeable amount with use of the proposed algorithm for …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 2, 2013 · pp. 24–34 Read article
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Performance Analysis of Complimentary Pass Transistor Logic Based Multiplexer Using Dual-gate FinFET Technology
Abstract: AbstractThis paper presents the design and analysis of double gate FinFET complimentary pass transistor logic (CPL) multiplexer. The circuit of multiplexer (MUX) using CPL is used for comparison of performance parameters like average power consumption, rise/fall time, delay, slew rate, PDP and EDP. Multiplexer is a digital circuit, it has inputs and select line; select lines are used for select input lines to transfer data to the output end. The …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 1, 2018 · pp. 41–48 Read article
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High Speed and Low Power Basic Digital Logic Gates, Half-Adder and Full-Adder Using Modified Gate Diffusion Input Technology
Abstract: In this paper, modified gate diffusion input (MGDI) technology has been used for the design and implementation of digital integrated circuits (ICs). In today’s digital world, IC plays a vital role in high-performance computing, communication, and many consumer electronics. IC manufacturing technology has scaled down to smaller device dimensions. This scaling has a great impact on the design of digital ICs. The main objective of the IC manufacturing technology is …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 1, 2018 · pp. 34–42 Read article
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Automatic Toll Collection System
Abstract: This paper presents the automatic toll collection system. This is Arduino based automatic system using infrared sensors. Automatic toll collection system’s purpose is to collect toll from the vehicles without making the vehicle stop at a toll booth. In this system, the user only has to get the transmitter from the main toll office. The transmitter will be charged by the operator of the booth office and the data will …
Published in Journal of Control & Instrumentation · Vol. 8, Issue 1, 2017 · pp. 35–38 Read article
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Single Bit Low-Power High-Speed Full Adder
Abstract: This paper presents a high-speed low-power full adder cells that lead to have a reduced power-delay product (PDP). A comparison against other full-adder structure as having low PDP, in terms of speed, power consumption and area of cells is carried out. This paper contains, a hybrid 1-bit full adder design employing both complementary metal-oxide semiconductor (CMOS) and transmission gate logic styles. First implemented was the design for 1 bit then …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 2, 2017 · pp. 55–60 Read article
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Single Bit Low-Power High-Speed Full Adder
Abstract: This paper presents a high-speed low-power full adder cells that lead to have a reduced power-delay product (PDP). A comparison against other full-adder structure as having low PDP, in terms of speed, power consumption and area of cells is carried out. This paper contains, a hybrid 1-bit full adder design employing both complementary metal-oxide semiconductor (CMOS) and transmission gate logic styles. First implemented was the design for 1 bit then …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 55–60 Read article
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Hardware and Power Efficient Single Bit Full Adder Using GDI and PTL Technique
Abstract: Abstract: This study presents hardware and power efficient single bit full adder which consists of two techniques, Pass Transistor Logic (PTL) and Gate Diffusion Technique (GDI). Several logic families are described by PTL which is utilized in the architecture of integrated circuits. PTL technique is used to decrease the number of transistors in the circuits to make different logic gates. GDI technique is utilized for the low power consumption. CADENCE …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 7, Issue 3, 2019 · pp. 9–17 Read article
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Implementation and Impact of RFID in Library Management Systems
Abstract: This system relies on UHF RFID scanners at the gate and transaction section, which are supported by antennas and RFID transceivers embedded in library cards. These devices allow information to be electronically stored and read/written using radio waves without the need for physical interaction. It does not require manual input and instantly sends information about books and library users to the library's management system. It has a record-keeping and search …
Published in International Journal of Solid State Innovations & Research · Vol. 1, Issue 1, 2023 · pp. 20–25 Read article
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Design and Implementation of Low-power SPI Shift Register
Abstract: SPI stands for serial peripheral interface which is used for serial, synchronous and full duplex communication of data between master and slave devices. Master devices can be Microprocessors or Microcontrollers; and slaves are the Peripheral devices interfaced with them. The main internal component for architecture of master/slave block is shift register which defines its operation. But as the size of the shift register increases, power is utilized to a greater …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 1, 2023 · pp. 1–15 Read article
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Memristor based Material Implication Logic for Implementation of Basic logic Gates and Circuits
Abstract: A physical memristor was realized a few years back by Hewlett Packard labs. Instantly it became the topic of interest for many scientists and researchers. Memristor has joined resistor, capacitor and inductor in the list of basic two-terminal passive circuit elements. Field Programmable Gate Arrays (FPGAs) have become a major choice of technology for the implementation of various digital circuits because they offer various features such as quick time to …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 1, 2018 · pp. 17–22 Read article
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Design of a Verilog HDL-Based Advanced Intelligent Automatic Railway Gate Control System
Abstract: Human mistake, sluggish reaction times, and manual gate operation are common causes of railway level crossing accidents. This project suggests an Intelligent Automatic Railway Gate Controller made with Verilog HDL and simulated in Xilinx Vivado to lessen these mishaps. With the goal of improving safety at unmanned railway crossings, the system is intended to offer a dependable and entirely automated solution. Without human interaction, the railway gate is automatically controlled …
Published in International Journal of Electronics Automation · Vol. 4, Issue 1, 2026 Read article
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Design and Implementation of High-Speed Low Power Low Area Hybrid One Bit Full Adder Using CMOS Technology
Abstract: In this article, we'll take a look at a new kind of Full Adder (FA) design that mixes traditional Complementary Metal Oxide Semiconductors (CCMOS) with Pass Transistors (PTs) and Transmission Gates (TGs). To analyze the circuit's performance, we used the Mentor Graphics software package. Since all twenty (20) varieties of Full Adder circuits were able to be measured and compared, this research was conducted. When the clock rate of the …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 2, 2023 · pp. 29–39 Read article
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Low Power Area Efficient 4×4 Vedic Multiplier using GDI half adders with Better Delay Performance
Abstract: In the field of VLSI, wireless communication and digital signal processing, low power and area efficient architectures are considered. Majority of such applications uses multiplication. The multiplication is done using repetitive addition and shift and add method. It consumes more area delay and power. Vedic multiplier is one of the efficient multiplier. It is designed using different Vedic techniques or sutras, which reduces the area, power consumption and provide better …
Published in Journal of Control & Instrumentation · Vol. 10, Issue 2, 2019 · pp. 28–39 Read article
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Improvement of Design Issues in FinFET based Design Techniques for XOR and XNOR Circuits at 45 nm Technology
Abstract: The scaling of conventional CMOS circuit inclines to the short channel effect due to leakage current increase in the circuit. To minimize the short channel effect, FINFET can be used in place of conventional CMOS circuits. This paper demonstrates comparative performance study of high speed, low power and low voltage on XOR and XNOR digital circuit. This paper assesses and compares the performance of XOR and XNOR logic circuits. This …
Published in Journal of Electronic Design Technology · Vol. 5, Issue 1, 2014 · pp. 22–35 Read article
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An Innovative Approach of the Analysis of the Low Noise of a CMOS-Based Amplifier for Analog Signal-based Applications
Abstract: A low-noise amplifier (LNA), which is based on the cascode feedback methodology, has been commonly used for various wireless protocol-based network applications nowadays. It is so because this topology ensures that the low-noise amplifier (LNA) can achieve quite a high performance and thus, provides a high qualitative output. This amplifier is operated with a low voltage supply in the range of few volts that requires that the impedances of the …
Published in Journal of VLSI Design Tools and Technology · Vol. 2, Issue 1-2-3, 2012 · pp. 7–15 Read article
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Intelligent automated railway crossing gate control system
Abstract: The high incidence of accidents at railway level crossings due to human errors and lack of proactive track monitoring is a challenge for rail safety in high-density networks. This paper proposes the development and validation of an intelligent automated railway crossing system- IARCS that leverages sensor fusion and IoT communication to eliminate human dependency and mitigate intrusion risks. The core system deploys an Arduino Uno for the purpose of primary …
Published in Journal of Microcontroller Engineering and Applications · Vol. 13, Issue 1, 2026 · pp. 20–28 Read article
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Low-power, High-speed, Full-swing Hybrid Full Adder
Abstract: Abstract: Nowadays VLSI design demands low area and low-power consumption. In this study, a low-power, high-speed, full-swing 1-bit hybrid full adder is proposed. The hybrid full adder is decomposed into three sub-modules. For each sub-module, designs are different. Module 1 and 2 are designed using pass transistor logic (PTL) and Module 3 uses transmission gates to produce carry signal. Then by proposed low-power, high-speed hybrid full adder circuits play a …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 7, Issue 3, 2019 · pp. 22–29 Read article
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Performance Improvement of Nano Field Effect Transistor Based on Zinc Oxide Semiconducting Materials – a Critical Analysis
Abstract: New semiconductor materials and new shapes for contemporary nanostructured semiconductor devices, like nanowires, have been researched as a result of advancements in transistor technology. Because of their unique electrical, photonic, and sensing capabilities, nanowires (NWs) constructed of various semiconductor material systems (gallium arsenide, zinc oxide, etc.) have been the subject of intense research over the past 20 years. Due to its distinctive properties, including high electron mobility, high crystalline quality, …
Published in Journal of Polymer & Composites · Vol. 12, Issue 2, 2024 · pp. 99–107 Read article
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The Significance and Applications of Parallel Computing in the Modern Era
Abstract: This article explores the advancements in parallel computing, focusing on its applications in various domains such as scientific simulations, big data analytics, artificial intelligence, and real-time processing. We discuss the architectural shifts from traditional single-core processors to multi-core and many-core systems, along with the role of graphics processing unit (GPU)-based computing and specialized hardware like tensor processing units (TPUs) and field programmable gate arrays (FPGAs). Furthermore, the article examines contemporary …
Published in Recent Trends in Parallel Computing · Vol. 12, Issue 1, 2025 · pp. 24–38 Read article
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IoT-based Intelligent Car Parking System
Abstract: Lack of dedicated parking spaces and difficulty finding an empty spot quickly are two main problems with the existing parking system. This system aims to rectify the current parking issues by presenting an IoT-based intelligent car parking system with an Arduino UNO, an anIRsensorfordetection, an LCD screen, servo motors, and a numeric pad. Our parking system employs a microcontroller and an LCD to show the number of vacant spaces and …
Published in Trends in Opto-electro & Optical Communication · Vol. 13, Issue 2, 2023 · pp. 32–38 Read article