Search
14 articles for “gate dielectric”
-
Numerical Simulation and Parameter Analysis for Pentacene based Organic thin Film Transistor with HfO2 Gate Dielectric
Abstract: This paper explains 2D numerical simulation and Characterization of Electrical parameter of Pentacene (Organic semiconductor) based Organic thin film transistor (OTFT) devices with HfO2 as a gate dielectric and Electrical parameters including; Threshold Voltage (Vt), Mobility (µ),Ion/Ioff, and Transconductance (gm), Sub threshold slope (SS) are extracted. The numerical simulation includes model for defect density of state and field dependent mobility model.
Published in Journal of Semiconductor Devices and Circuits · Vol. 6, Issue 2, 2019 · pp. 28–34 Read article
-
Performance Analysis of Ultra-Short Junctionless DGMOS Nanowire Transistors with High-k Gate Dielectric
Abstract: AbstractIn this report, we present a comparative analysis of ultrashort 3-D junctionless nanowire DGMOS transistors using different high-k gate dielectric by virtually fabricating the device in Visual TCAD. The ultrashort devices having channel length of 20 nm were simulated and performances like I-V characteristics, transconductance etc. were analysed. It was found that HfO2 has better steady state performances as gate dielectric owing to better control of the channel over the …
Published in Journal of Communication Engineering & Systems · Vol. 9, Issue 1, 2019 · pp. 35–42 Read article
-
On a Nanocomposite Metal Oxide Thin-film Transistor with Nanofilm Gate Dielectric Material: Material Chemistry, Sol–Gel Process and Electronic Worthiness
Abstract: ABSTRACT : ILO based MOTFT is fabricated with PBZ gate dielectric. PBZ is formed over doped Si substrate by cheap sol-gel process. Thin film PBZ is analysed with XRD, UV-Vis and AFM. IZO is used as bottom gate to contact TFT. This device needs only 5V as operating voltage, and so is good for lower electronics <40V. It shows excellent e-mobility 4.5cm2/V/s, with on/off ratio 5x105 and sub-threshold swing 0.35V/decade.
Published in Journal of Thin Films, Coating Science Technology & Application · Vol. 6, Issue 3, 2019 · pp. 8–12 Read article
-
Numerical Simulation of Pentacene based Organic Thin Film Transistor with Inorganic Gate Dielectrics
Abstract: This paper presents a 2D numerical simulation and Electrical Characterization of Pentacene (Organic semiconductor) based Organic thin film transistor (OTFT) devices with different inorganic gate dielectrics materials SiO2, Al2O3 and HfO2 and Electrical parameters including; Mobility (µ), Threshold Voltage (Vt), Ion/Ioff ,Sub threshold slope (SS) and Transconductance (gm) are extracted.
Published in Journal of Microelectronics and Solid State Devices · Vol. 6, Issue 2, 2019 · pp. 32–38 Read article
-
Modeling and Simulation of Pentacene based Organic Thin Film Transistors with Organic Gate Dielectrics
Abstract: AbstractTwo structures of pentacene organic thin film transistors (OTFT) with organic dielectrics, polymethyl methacrylate (PMMA) and polyvinyl alcohol (PVA) have been numerically simulated with TCAD ATLAS tool. Output and transfer characteristics were simulated and mobility, threshold voltage, sub threshold swing (SS) and current on/off ratio that play a part in the increment of conductivity of device were extracted. The authors show that the semiconductor-insulator interface actively affects the performance of …
Published in Journal of Microelectronics and Solid State Devices · Vol. 4, Issue 3, 2017 · pp. 13–18 Read article
-
A Dual Material Control Gate Tunnel Field Effect Transistor for an Asymmetric Doping at Source and Drain Regions
Abstract: Double-Gate tunnel FET devices, which uses high-κ gate dielectric, are explored using realistic design parameters, showing an ON-current as high as 0.23 mA, a gate voltage of 1.8 V, an OFF-current of not more than 1 fA (neglecting gate leakage), an improved ordinary subthreshold swing of 57 mV/dec, and a lower point slope of 11 mV/dec. A dual material control gate tunnel field effect transistor for an asymmetric doping at …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 3, 2018 · pp. 45–53 Read article
-
MOS Capacitor: A Processing Tool
Abstract: In this modern world of technology, life without electronics is unimaginable. We are now living in the age of electronics. It is hard to find an electrical item in your home that does not have electronics part in it. The electronic devices give better efficiency and reliability in terms of power loss, speed and cost; the fundamental component of each Integrated Circuit (IC) chip, namely the MOSFET (metal oxide semiconductor …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 1, 2018 · pp. 27–32 Read article
-
A Review on Tunnel Field Effect Transistor for Ambipolar Suppression, Higher ON Current and a Lower Subthreshold Swing
Abstract: Modern IC technology force on the ICs design considering more area optimization and low power techniques. We study herein the effect of hetero gate dielectric materials on the OFF-current (IOFF) and ON-current (ION) of the heterogate (high-k/low-k) tunnel field-effect transistor for which the simulations give significant improvements as compared to single-gate devices using an SiO2 gate dielectric. The ambipolar behavior is suppressed and radio frequency (RF) parameters are enhanced by …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 2, 2018 · pp. 55–66 Read article
-
Influence of Graded Channel on Performance of Symmetric Double Material Gate Insulator FDSOI MOSFET
Abstract: Abstract: In this paper, we investigate the effect on the linearity, analog and RF performance of graded channel in case of hetero-gate-dielectric FDSOI MOSFET with higher doping at source end and low doping at drain end. The major figure of merits (FOMs) studied are on-state drive current (ION), transconductance (gm), total gate capacitance (Cgg), cut-off frequency (fT), higher order derivative of transconductance (gm’, gm’’), intermodulation distortion (IMD3) and third- order …
Published in Journal of Microelectronics and Solid State Devices · Vol. 6, Issue 1, 2019 · pp. 12–17 Read article
-
Machine Learning Assisted Optimization of Nanoscale MOSFET Parameters Using TCAD Simulation
Abstract: This paper presents a machine learning (ML) assisted framework for the multi-objective optimization of nanoscale bulk n-channel metal-oxide-semiconductor field-effect transistors (nMOSFETs) with a 10 nm physical gate length, high-k HfO₂ gate dielectric, and TiN metal gate. Technology computer-aided design (TCAD) simulations employing drift-diffusion transport, Shockley-Read-Hall recombination, Lombardi mobility degradation, and density- gradient quantum correction models are used to generate a parametric dataset of 2,400 device configurations spanning gate length (L), …
Published in Journal of Microelectronics and Solid State Devices · Vol. 13, Issue 1, 2026 · pp. 10–19 Read article
-
Technometric Portrait of Sri Vinod Dham, an Indo-US Engineer, Father of Intel Pentium Process: A Quantitative Analysis
Abstract: Vinod Dham is recognized as the ‘Father of Pentium Chip’ or ‘Father of Intel Pentium Process’ in the field of the computer industry, and as an Indo-American pioneer from Silicon Valley. He has contributed 10 research papers during 1982–1986, with an average of two papers per year. This study tries to analyze his contributions through a bibliometric study and draw his familiarity as a world-famous electronic technologist. Data has been …
Published in Research & Reviews : Journal of Statistics · Vol. 14, Issue 3, 2025 · pp. 16–25 Read article
-
Suitability of Various Low Power Strategies for SRAM Design: A Survey
Abstract: In very high performance system on chip, static power dissipation plays a dominant role compared to dynamic component and it increases with technology scaling. Scaling of bulk MOSFET faces more and more challenges at 45 nm technology or below by producing short channel effect (SCE) which leads to increase in leakage current. An obstacle with bulk MOSFET at 45 nm or below gate length includes SCE, subthreshold leakage and gate …
Published in Journal of Semiconductor Devices and Circuits · Vol. 2, Issue 1, 2015 · pp. 6–13 Read article
-
Influence of Dielectric and Active layer Thickness on MgZnO Thin Film Transistor Electrical Characteristics
Abstract: From last decades, Thin Film Transistors Technology uses low-k dielectric material as an insulator. Insulator thickness plays an important role in device dimension. The insulating layer also known as the gate oxide separates the gate electrode from the channel region of the transistor. If the insulating layer is too thin, there is a greater chance that electrons can tunnel through the oxide layer, leading to leakage current. To mitigate this …
Published in Journal of Polymer & Composites · Vol. 11, Issue 5, 2023 · pp. 17–26 Read article
-
Performance Analysis of Fully Flexible Organic Humidity Sensor with Top-Contact and Bottom-Contact OTFTs
Abstract: Abstract: Organic field-effect transistor (OFET) based humidity sensors are extensively used nowadays due to their low cost, mechanically flexible and compatibility with lower temperature fabrication techniques that support the plastic substrate based device and circuit applications. This paper investigates the humidity dependence of performance of organic humidity sensor with Top-Contact and Bottom-Contact OTFTs. Subsequently, impact of channel length on sensor performance is analyzed. The humidity sensitivity of organic sensor drain …
Published in Journal of Semiconductor Devices and Circuits · Vol. 6, Issue 1, 2019 · pp. 26–34 Read article