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32 articles for “VLSI”
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Transforming IoT Connectivity Through VLSI Technology
Abstract: Device communication has been completely transformed by the emergence of the Internet of Things (IoT), and very large-scale integration (VLSI) has been essential to this change. The development of small, energy-efficient devices that are essential to IoT applications is made possible by VLSI technology, which allows thousands to millions of transistors to be integrated on a single chip. By enabling higher processing capabilities and seamless connectivity, VLSI not only enhances …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 2, Issue 2, 2024 · pp. 1–11 Read article
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A well-planned strategy for a career path in VLSI design
Abstract: Very Large Scale Integration (VLSI) design is still one of the most active and important areas of the semiconductor industry. It is behind new developments in AI, 5G, automotive electronics, and high-performance computing. As companies like Intel, TSMC, and NVIDIA work to improve advanced-node technology, the need for qualified VLSI engineers is growing. However, people who want to work in this industry typically don't know what technical skills, tools, and …
Published in Journal of VLSI Design Tools and Technology · Vol. 16, Issue 1, 2026 · pp. 28–39 Read article
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The Integration of Machine Learning in VLSI IC Design
Abstract: It represents the first use of AI in the domain of integrating circuits, which has been impacted by it. The conventional VLSI design process that is now in use is replaced by this technology. The laborious manual concepts created by people have been replaced with automated design innovations. This development would trigger a profound change in the fields of AI education and hardware computation. With the introduction of contemporary chips, …
Published in Trends in Machine design · Vol. 11, Issue 2, 2024 · pp. 1–8 Read article
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VLSI Based Traffic Light Controller
Abstract: This study details the development and realization of an advanced traffic light control system utilizing VHDL (Very High-Speed Integrated Circuit Hardware Description Language) in conjunction with FPGA (Field Programmable Gate Array) technology. The system is designed to regulate a four-way intersection, with one primary high-traffic road intersecting with a less congested side road. To enhance traffic efficiency and minimize idle times, the model incorporates intelligent features such as a vehicle …
Published in Journal of VLSI Design Tools and Technology · Vol. 15, Issue 2, 2025 · pp. 40–47 Read article
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A Comprehensive Review of CMOS Analog Circuit Design Techniques for Low-Power VLSI Systems
Abstract: CMOS analog circuit design plays a significant role in the development of modern low-power Very Large-Scale Integration (VLSI) systems used in wireless communication, biomedical devices, portable electronics, embedded systems, and Internet of Things (IoT) applications. Research on low-power CMOS analogue design methodologies has intensified because to the growing need for high-performance, small, and energy-efficient electronic products. However, reducing power consumption while maintaining signal accuracy, noise performance, stability, bandwidth, and overall …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 4, Issue 1, 2026 Read article
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Hybrid Quantum-Classical Reinforcement Learning Enabled Thermal-Aware Electronic Design Automation Framework for Energy-Efficient Next-Generation VLSI Systems Applications
Abstract: Modern Very Large-Scale Integration (VLSI) systems are becoming more complicated, which has increased need for sophisticated Electronic Design Automation (EDA) frameworks that can concurrently optimise thermal behaviour, power consumption, and performance. This study proposes a Hybrid Quantum-Classical Reinforcement Learning (HQCRL) Enabled Thermal-Aware EDA Framework for next-generation energy- efficient VLSI systems. The proposed framework integrates quantum-inspired optimization techniques with classical reinforcement learning algorithms to address the challenges of placement, routing, and …
Published in Journal of Electronic Design Technology · Vol. 17, Issue 2, 2026 Read article
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VLSI – Power, Expansion and Versatility
Abstract: The evolution of Very Large-Scale Integration (VLSI) technology has significantly transformed the landscape of modern electronics, driving innovations across diverse industries. This article explores the key attributes of VLSI, focusing on its power, expansion, and versatility. VLSI's power lies in its ability to integrate thousands to millions of transistors on a single chip, enabling the development of high-performance, energy-efficient devices. The expansion of VLSI technology is exemplified by its application …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 3, Issue 1, 2025 · pp. 1–8 Read article
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Machine Learning Assisted Timing Violation Prediction in Sub-7nm VLSI Physical Design
Abstract: The continuous scaling of semiconductor technology into the sub-7nm regime has introduced significant challenges in timing closure due to process variability, interconnect delay, power density, and manufacturing uncertainties. Conventional static timing analysis techniques often require extensive computational resources and iterative optimization cycles, resulting in increased design complexity and longer turnaround time. This research proposes a Machine Learning Assisted Timing Violation Prediction framework for sub-7nm VLSI physical design to improve early-stage …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 4, Issue 1, 2026 Read article
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An Overview on VLSI based Hardware Security in IoT Node
Abstract: In the coming era, security will not be a feature we add to an IoT device; it will be a property inherent to its transistor-level design. By encoding security into the VLSI architecture, we move away from the fragile "software-only" paradigm and toward a future where the identity of the device is as immutable as the laws of physics. The rapid proliferation of Internet of Things (IoT) devices has transformed …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 4, Issue 1, 2026 Read article
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Thermally Adaptive Bio-Inspired VLSI Interconnect Model for Next-Generation Embedded Systems
Abstract: The increasing complexity of next-generation embedded systems has intensified the challenges associated with power dissipation, thermal instability, signal integrity, and interconnect reliability in Very Large- Scale Integration (VLSI) architectures. This research proposes a thermally adaptive bio-inspired VLSI interconnect model designed to enhance communication efficiency and thermal resilience in advanced embedded platforms. The proposed model integrates bio-inspired adaptive routing principles with dynamic thermal-aware interconnect management to optimize data transmission under varying …
Published in Journal of VLSI Design Tools and Technology · Vol. 16, Issue 2, 2026 Read article
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Optimizing Routing and Placement of VLSI Circuits with Differential Algorithms and Neural Networks
Abstract: The performance of modern VLSI systems is heavily influenced by power constraints, necessitating precise power estimation and effective optimization techniques. Traditional methods, such as gate-level simulations, are often slow and computationally intensive. This paper introduces DRPENN (Differential Algorithm for Routing and Placement Optimization using Neural Networks), an innovative solution that combines a Switching Activity Estimator (SAE) with a neural network-assisted differential algorithm. By leveraging toggle rates from simulations to train …
Published in Journal of VLSI Design Tools and Technology · Vol. 14, Issue 2, 2024 · pp. 14–20 Read article
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A Neuromorphic-Inspired, Low-Power VLSI Architecture for Edge AI in IoT Sensor Nodes
Abstract: As the proliferation of Internet of Things (IoT) devices continues to rise, there is an increasing demand for real-time, energy-efficient artificial intelligence (AI) processing directly at the network edge. Traditional edge AI accelerators, often based on deep learning models like convolutional neural networks (CNNs), struggle to meet the ultra-low-power requirements of battery-constrained IoT sensor nodes. In response to this challenge, this study introduces a neuromorphic-inspired, low-power very- large-scale integration (VLSI) …
Published in Journal of Microelectronics and Solid State Devices · Vol. 12, Issue 2, 2025 · pp. 41–47 Read article
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Performance Analysis of AES Encryption Using LFSR-Based Key Expansion in VLSI
Abstract: Secure data transmission has become increasingly important with the rapid growth of digital communication and embedded systems. Protecting sensitive information from unauthorized access requires reliable cryptographic solutions. Among the available techniques, the Advanced Encryption Standard (AES) is widely recognized for its strong security and efficient implementation in both hardware and software environments. In this work, the design and performance evaluation of an AES-based crypto processor with LFSR-driven key expansion is …
Published in Recent Trends in Electronics Communication Systems · Vol. 13, Issue 1, 2026 Read article
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Design of Decoder Using Domino Logic Circuit for VLSI
Abstract: Dissipation of power from a circuit is the major issue in the design of any VLSI circuit, which decreases the life span of a device/system. NMOS and PMOS circuits are very slow while switching the state from low to high. The speed of the circuit can be increased by decreasing resistance. This process in turn increases the static power dissipation. So, because of these disadvantages, CMOS circuits are used in …
Published in Journal of VLSI Design Tools and Technology Read article
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An Efficient Counter Using Modified Upper and Lower SVL Techniques and TSPCL
Abstract: Low power VLSI has emerged as the fundamental building block of the modern electronic era. This leads to a substantial paradigm shift where both power dissipation, performance and area of utmost importance. In the earlier time of fabrication, power dissipation was mainly neglected due to low device density and low operating frequency needed for computation. But in modern technological era, the need for high device density, higher operating frequency, proliferation …
Published in Research & Reviews : Journal of Physics · Vol. 13, Issue 2, 2024 · pp. 37–43 Read article
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A Majority Function Based Full Subtractor
Abstract: In the present landscape of very large-scale integration (VLSI) technology, the imperative to implement Boolean functions with minimal gate count remains a cornerstone of efficient circuit design. This pursuit has only grown more critical with the evolution of low-power design strategies, which now offer significantly enhanced benefits compared to traditional approaches. The trifecta of performance, affordability, and dependability continue to drive innovation in this field, shaping the trajectory of technological …
Published in Research & Reviews : Journal of Physics · Vol. 13, Issue 2, 2024 · pp. 8–14 Read article
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High Performance Multi-Valued Logic (MVL)Gate Design Using FinFET
Abstract: CMOS scaling faces challenges such as leakage, power dissipation, and short channel effects. Multi-Valued Logic (MVL) offers higher information density and reduced interconnections. This work presents a FinFET-based MVL gate design that improves electrostatic control, switching speed, and reliability. Simulation results confirm reduced leakage power and enhanced performance compared to conventional logic. The proposed architecture demonstrates scalability for advanced technology nodes. It also shows potential for low-power applications in portable …
Published in Journal of Microelectronics and Solid State Devices · Vol. 13, Issue 1, 2026 · pp. 34–45 Read article
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64 Bit ALU DESIGN USING VEDIC MATHEMATHICS
Abstract: High-speed arithmetic operations are crucial for better performance in contemporary digital systems. Particularly for high bit-width operations, conventional arithmetic logic units (ALUs) frequently experience increased latency and complexity. This work presents the design and implementation of a 64-bit Arithmetic Logic Unit (ALU) using notions from Vedic mathematics. The suggested design makes use of a Kogge-Stone Adder for effective addition and the Urdhva Tiryagbhyam sutra for quick multiplication. Among other mathematical …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 4, Issue 1, 2026 Read article
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The Role of Majority Functions in Enhancing Full Subtractor Performance in High-Density Logic Circuits
Abstract: In the present trend of very large-scale integration (VLSI) technology, implementing a Boolean function with the fewest number of gates (logic) has always been important. Low power design strategies now provide much more benefits than in the past. Performance, affordability, and dependability may be key issues in this area of technology design. Power dissipation is now recognized as a crucial component in the development of competitive market areas such wireless …
Published in Journal of Semiconductor Devices and Circuits · Vol. 11, Issue 2, 2024 Read article
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RTL-to-GDS Implementation of a High-Speed On-Chip 32:1 Serializer Using Open-Source Tools
Abstract: Exploring the RTL-to-GDS implementation of a high-speed on-chip 32:1 serializer, this study investigates the integration of open-source tools within VLSI design, emphasizing sustainable practices in the semiconductor industry while operating at the nanometer scale. Addressing methodologies for optimizing power consumption and chip area utilization, particularly focusing on efficient use of non-renewable resources. The study is set against the backdrop of advanced 7nm FinFET technology, critical for enabling efficient data transmission …
Published in Journal of VLSI Design Tools and Technology · Vol. 14, Issue 3, 2024 · pp. 1–10 Read article