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13 articles for “SILVACO_TCAD.”
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Study of Scaling of MOSFET on Various Electrical Characteristics using Silvaco TCAD Tool
Abstract: MOSFETs are the driving work horse of semiconductor industry. Over the years, the MOSFET device density has been continuously increasing owing to the reduction in channel length of MOSFET device. This article discusses the effect of scaling i.e. channel length and gate oxide thickness on various parameters like threshold voltage, transconductance, maximum drain current and subthreshold slope. It is important to consider that with scaling of the channel length; the …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 1, 2018 · pp. 11–19 Read article
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Comparative Study of Drain Current of Symmetric and Asymmetric DG-MOSFET with Simulation in Silvaco TCAD Software
Abstract: One of the most attractive and promising devices for the nanoscale devices is the double gate MOSFET. The double gate MOSFET can control the Si channel very efficiently and it chooses a very small width of the Si channel. It controls the Si channel by applying gate contact to either side of the channel. The idea of controlling the S channel in such a way reduces the short channel effects …
Published in Journal of Semiconductor Devices and Circuits Read article
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Comparative study of Drain current of Symmetric and Asymmetric DGMOSFET with simulation in Silvaco_TCAD Software
Abstract: For nano regime devices the double gate MOSFET is one of the most promising and attractive devices. The main idea of a Double Gate MOSFET is to control the Si channel very efficiently by choosing the Si channel width to be very small and by applying a gate contact to both sides of the channel. This concept helps to suppress short channel effects and leads to higher currents as compared …
Published in Journal of Semiconductor Devices and Circuits · Vol. 8, Issue 1, 2021 · pp. 1–13 Read article
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Design and Optimization of Nano scale Double Gate SOI-MOSFET for Analog Applications Using SILVACO TCAD
Abstract: In this paper the structure effect on electrical characteristics of 60-nm double-gate Silicon-on-Insulator Metal-Oxide-Semiconductor Field Effect Transistor (DG-SOI-MOSFETs) is explored. These structures enable more aggressive device scaling in nano scale region because of their ability to control short channel effects. Established a scaling theory which gives guidance for the device optimization (Silicon film thickness Tsi (20nm); gate oxide thickness Tox (3nm); buried oxide thickness Tbox (200nm) and gate length LG …
Published in Journal of Electronic Design Technology · Vol. 1, Issue 1-3, 2011 · pp. 7–17 Read article
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Investigating the effect of Anodes workfunction on the Opto-electronics Performance of Organic Light Emitting Diode
Abstract: The research aims to assess the performance of organic light-emitting diodes (OLEDs) by exploring how various anode materials affect their optoelectronic properties. OLEDs are crucial for modern displays and lighting, and their efficiency and functionality are heavily influenced by the materials used in their design.This study examines four different anode materials: Indium Tin Oxide (ITO), Zinc Oxide (ZnO), Aluminum-doped Zinc Oxide (AZO), and Poly(3,4-ethylenedioxythiophene) Polystyrene Sulfonate (PEDOT: PSS). These materials …
Published in Research & Reviews : Journal of Physics · Vol. 13, Issue 2, 2024 · pp. 27–37 Read article
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Performance Analysis of Dual Junction Solar Cell Devices utilizing Subcells of In0.51Ga0.49P and GaAs to Study Key Solar Cell Parameters via TCAD based Simulation
Abstract: In the present work, a multi-junction solar cell was designed to obtain better performance over single-junction solar cells. The proposed structure is composed of different layers of diverse semiconductor materials stacked on each other. Here, an In0.51Ga0.49P/GaAs double-junction solar cell was outlined as having a distinctive composite material (GaAs) as the tunneling junction. To optimize the solar cell's effectiveness, In0.47Ga0.15Al0.37P was used in the window layer and the back-surface field …
Published in Journal of Polymer & Composites · Vol. 13, Issue 1, 2025 · pp. 829–837 Read article
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Comparative Analysis of FD-DMDG SON MOSFET over FD DMDG SOI MOSFET
Abstract: AbstractIn the recent past, Silicon-on-Insulator (SOI) shows better device performance in comparison to bulk Silicon devices but it still suffers from different short channel effects (SCEs). Recently a structure, Silicon on Nothing (SON), has been suggested and investigated. It is structured to be capable of substantial reduction of SCEs and present better electrical characteristics in comparison to SOI. The absence of the buried layer results in the reduced electrostatic coupling …
Published in Journal of Electronic Design Technology · Vol. 9, Issue 1, 2018 · pp. 9–16 Read article
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Virtual Fabrication and Analog Performance of Sub-40nm Bulk MOSFET
Abstract: Virtual Fabrication of sub-40nm Bulk MOSFET is carried out under channel engineering and source drain engineering process. These structures enable more aggressive device scaling in nano-scale region because of their ability to control short channel effects. How ever during scaling the junction depth should also be scaled down, which increases parasitic resistance so silicidation technique has been applied to reduce their effects on device. Analog performance has been measured in …
Published in Journal of Electronic Design Technology · Vol. 1, Issue 1-3, 2011 · pp. 34–40 Read article
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Influence of Graded Channel on Performance of Symmetric Double Material Gate Insulator FDSOI MOSFET
Abstract: Abstract: In this paper, we investigate the effect on the linearity, analog and RF performance of graded channel in case of hetero-gate-dielectric FDSOI MOSFET with higher doping at source end and low doping at drain end. The major figure of merits (FOMs) studied are on-state drive current (ION), transconductance (gm), total gate capacitance (Cgg), cut-off frequency (fT), higher order derivative of transconductance (gm’, gm’’), intermodulation distortion (IMD3) and third- order …
Published in Journal of Microelectronics and Solid State Devices · Vol. 6, Issue 1, 2019 · pp. 12–17 Read article
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Reduction of Short Channel Effects with the Variation of Poly Doping and Source/Drain Doping
Abstract: In this paper, the concentration of poly-silicon doping and source/drain doping has been varied to obtain the approximation the OFF state leakage current for N channel MOSFET. A lightly doped NMOS has been designed using 45 nm technology in ATHENA and simulated in ATLAS of SILVACO TCAD tool. After simulation results, it has been observed that as the poly-silicon doping and source drain doping concentrations are decreased, there is a …
Published in Journal of Semiconductor Devices and Circuits · Vol. 4, Issue 3, 2017 · pp. 35–42 Read article
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Design and Analysis of Inverters using Double Gate MOSFET
Abstract: AbstractThe double gate MOSFET is a form of MOSFET where two gates are fabricated along the length of the channel, one after another. There are several applications of double gate MOSFETs. It is possible to design logic gates using double gate MOSFETs. It is one of the digital applications of it. This paper interprets the design and analysis of different types of inverters using DG-MOSFET. The advantages of using DG-MOSFET …
Published in Journal of Semiconductor Devices and Circuits · Vol. 4, Issue 1, 2017 · pp. 1–7 Read article
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Effect of Various Parameters on Threshold Voltage of Virtually Fabricated Lightly Doped PMOS Device
Abstract: This paper emphasis on the design, fabrication and analysis of 45 nm P type MOSFET device using SILVACO TCAD tool. The analysis was based on variation of various parameters like oxide thickness, threshold implant and halo implant (pockets) to analyze the threshold voltage. The drain versus gate and drain versus gate plots are being plotted using tony-plot. It has been observed that as the thickness of the oxide increases, threshold …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 13–20 Read article
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Effect of Various Parameters on Threshold Voltage of Virtually Fabricated Lightly Doped PMOS Device
Abstract: This paper emphasis on the design, fabrication and analysis of 45 nm P type MOSFET device using SILVACO TCAD tool. The analysis was based on variation of various parameters like oxide thickness, threshold implant and halo implant (pockets) to analyze the threshold voltage. The drain versus gate and drain versus gate plots are being plotted using tony-plot. It has been observed that as the thickness of the oxide increases, threshold …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 2, 2017 · pp. 13–20 Read article