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24 articles for “Hardware Descriptive Language”
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Area and Speed Efficient Floating Arithmetic Logic Unit Implementation on Hybrid FPGAS
Abstract: Proposed design of an Area and Speed optimized field arithmetic logic unit (FALU) for modern computing of advanced processors, as we are aware that in most of the DSP (Digital Signal Processors) FALU is a critical component for continuous calculation of signs and ongoing information to meet the constant situation of sign handling it is exceptionally needed to make calculation quicker as could be expected so we have thought of …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 9, Issue 3, 2021 · pp. 29–34 Read article
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VHDL Programming for Side-Channel Attack Countermeasures in IoT Security
Abstract: The Internet of Things (IoT) landscape is expanding rapidly, connecting billions of devices across diverse domains. This interconnectedness, while offering unprecedented convenience and efficiency, also creates a fertile ground for security vulnerabilities. Among these threats, side-channel attacks (SCAs) pose a significant risk, particularly targeting the cryptographic implementations that underpin IoT security. SCAs exploit information leaked from the physical execution of cryptographic algorithms, such as power consumption, timing variations, and electromagnetic …
Published in Journal of VLSI Design Tools and Technology · Vol. 15, Issue 2, 2025 · pp. 20–33 Read article
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VHDL Programming for Secure Bootloaders in IoT Security
Abstract: The proliferation of Internet of Things (IoT) devices has brought unparalleled connectivity and convenience. However, this increased connectivity comes with a heightened risk of security vulnerabilities. One of the most critical areas for securing IoT devices is the bootloader, the software responsible for initializing the device and loading the operating system. A compromised bootloader can lead to a complete takeover of the device, making it a prime target for malicious …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 3, Issue 1, 2025 · pp. 19–28 Read article
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Investigation of FPGA based PWM Control Technique for AC Motors
Abstract: This paper proposes a Random Frequency PWM synchronized for a three phase inverter implemented with use of Field Programmable Gate Array (FPGA) and applied to a 1-hp induction motor drive system for the reduction of harmonics and improvement of fundamental peak voltage. For providing alternating output voltage with a specific magnitude and frequency to industrial applications, three-phase inverter is preferred. The gating signals to the inverter are produced by means …
Published in Journal of Power Electronics and Power Systems · Vol. 3, Issue 2, 2013 · pp. 16–22 Read article
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Coded Communication Device with Hamming Code
Abstract: The field of invention is VLSI. In this invention, the authors have brought into light a coded communication device which increases the security level of the system. The tools like VHDL programming language that is VHSIC hardware description language and hamming code contributed to form the foundation of the invention. In this the authors have used transducer at input terminal whose output is given to encrypter. Similarly, at the receiver …
Published in Journal of Microcontroller Engineering and Applications · Vol. 2, Issue 1, 2015 · pp. 14–16 Read article
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Robust Access Control Mechanisms Using VHDL Programming for IoT Security
Abstract: The Internet of Things (IoT) devices are increasingly becoming targets for criminal actors. A compromised device can result in data breaches, denial-of-service attacks, and even physical damage. While software-based security solutions are important, they are susceptible to attacks and often impose significant overhead, negatively impacting both performance and battery life. A viable alternative is provided by hardware-based security, which takes advantage of the inherent security benefits that are associated with …
Published in Journal of VLSI Design Tools and Technology · Vol. 15, Issue 2, 2025 · pp. 6–1`9 Read article
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Implementation and Analysis of Linear Electrical Networks using Interval Arithmetic on FPGA’s
Abstract: Interval arithmetic provides better method for monitoring and controlling errors in scientific calculations. Interval arithmetic can be used to obtain an analysis of linear electrical networks using hardware description language (HDL). In this paper the mean value theorem is used to analyze the circuits and implemented on hardware. The mean value theorem is applied for three different circuits i.e., for first order, second order and third order analog circuits. The …
Published in Current Trends in Signal Processing · Vol. 4, Issue 3, 2014 · pp. 14–21 Read article
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Design and Simulation of FIR Filter using VHDL
Abstract: Digital Signal Processing (DSP) has gained great popularity in the recent years. DSP is used in the field of communication, medicine and entertainment. Earlier the digital signals use is expensive in the communication devices. DSP makes use of the digital filters in the communication equipment. The basic building block of the digital filter-adder, coefficient multipliers and delays. Digital filter can be implemented efficiently by selecting an efficient representation for filter …
Published in Journal of Communication Engineering & Systems · Vol. 8, Issue 1, 2018 · pp. 19–28 Read article
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Study And Literature Analysis of The Coarse-Grained Logic Interface with Floating-Point Arithmetic Unit
Abstract: Field-Programmable Gate Arrays (FPGAs) have become an essential digital circuit implementation techni que. The research looks at the design parameters by evaluating the building of an arithmetic logic unit (ALU) in Xilinx Vivado utilizing Hardware Description Language (HDL) and implementing common Field Programmable gate arrays (FPGAs). The ALU is a logic design component in digital computers that seeks to deliver optimal algorithms to maximize the usage of available hardware. The …
Published in Journal of VLSI Design Tools and Technology · Vol. 13, Issue 2, 2023 · pp. 45–55 Read article
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Automatic Coffee Making Machine Using Verilog HDL
Abstract: This Paper focuses on the design and implementation of a Coffee Machine using Verilog, aimed at understanding how real-life machines can be controlled using digital logic. In daily life, a coffee machine works by taking user inputs, processing them, and giving the required output such as preparing coffee. The main objective of this project is to design a simple digital system that controls the basic working of a coffee machine. …
Published in Journal of Electronic Design Technology · Vol. 17, Issue 1, 2026 · pp. 18–24 Read article
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Securing IoT Wilderness with VHDL
Abstract: The Internet of Things (IoT) has revolutionized connectivity by integrating billions of devices and reshaping industries. However, this vast network also brings substantial security concerns. From compromised sensors to hijacked industrial control systems, the vulnerabilities within IoT devices can have far-reaching consequences. Hardware Security Modules (HSMs) provide a reliable and secure environment for performing cryptographic operations and safeguarding sensitive data. This article explores the crucial role of VHDL (VHSIC Hardware …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 3, Issue 1, 2025 · pp. 29–40 Read article
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Detection of Fault and Protection of Faulted Distribution Feeder with Field Programmable Gate Array Using State Diagrams
Abstract: A hardware-efficient algorithm for fast fault-detection in feeders radiating out of a distribution substation and its subsequent clearance from the system for safe operation of the healthy parts has been presented in the paper. State diagrams used to design the circuit.The general purpose SPARTANE 3AN FPGA kit has been employed for developing the protective over-current relay. All the coding has been done using the hardware description language VERILOG. To avoid …
Published in Journal of Microcontroller Engineering and Applications · Vol. 2, Issue 2, 2015 · pp. 5–12 Read article
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Design, Implementation and Comparative Analysis of Different 8-Bit Multipliers Based on Power, Delay and Hardware Utilization
Abstract: Multipliers play important role in the digital VLSI design. Computational Speed, power consumption, and area are the major parameters on which the performance of the device depends. In digital design, there are different multiplication methods or algorithms. Each algorithm is having its own advantage and disadvantage. In this paper, implementation of five different types of 8-bit multipliers namely Array multiplier, Booth multiplier, Truncated multiplier, Pipelined multiplier, and Vedic multiplier has …
Published in Journal of VLSI Design Tools and Technology · Vol. 10, Issue 3, 2020 · pp. 22–34 Read article
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DESIGN OF SCRAP COLLECTION AND REWARD MACHINE USING VERILOG HDL
Abstract: The growing amount of waste produced in urban environments has led to a demand for effective and automated recycling solutions. In this paper, a scrap collection and reward machine is designed and implemented using the Verilog Hardware Description Language (HDL). The proposed system is developed to provide a reliable and automated approach for managing recyclable materials while motivating users through a reward-based mechanism. The design includes scrap input interfaces, a …
Published in Journal of Electronic Design Technology · Vol. 17, Issue 1, 2026 · pp. 37–45 Read article
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VLSI Based Traffic Light Controller
Abstract: This study details the development and realization of an advanced traffic light control system utilizing VHDL (Very High-Speed Integrated Circuit Hardware Description Language) in conjunction with FPGA (Field Programmable Gate Array) technology. The system is designed to regulate a four-way intersection, with one primary high-traffic road intersecting with a less congested side road. To enhance traffic efficiency and minimize idle times, the model incorporates intelligent features such as a vehicle …
Published in Journal of VLSI Design Tools and Technology · Vol. 15, Issue 2, 2025 · pp. 40–47 Read article
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Efficient Gabor Filter Design Using Verilog HDL with Multiplier-accumulator (MAC) Implementation
Abstract: This paper introduces a novel and enhanced Gabor filter design aimed at addressing the demands of image processing applications using the Verilog Hardware Description Language (HDL). Specifically, it leverages the Reconstruct Gabor filter technique to elevate the performance and quality of standard image outputs. The primary objective of this research endeavor is to simplify the study, conduct an in-depth analysis, and substantially enhance the design's efficiency, all while ensuring the …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 2, 2023 · pp. 40–46 Read article
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Study and analysis of the Double Data Rate SDRAM Controller for High-speed Interfacing with Processing Device
Abstract: A real-time embedded system must now manage many programs running concurrently. Increased Data Rate Because of its burst access, speed, and pipeline features, synchronous DRAM is a typical memory-building material. DDR transfers are performed using synchronous dynamic access memory. The memory controller must be set with a pipelined design for various applications and systems to perform effectively. The purpose of this study is to design a DRAM controller that will …
Published in Journal of VLSI Design Tools and Technology · Vol. 14, Issue 1, 2024 · pp. 8–13 Read article
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Simulation of Adder Circuit Using Reversible Gates in Verilog HDL
Abstract: The emerging field of quantum computing uses quantum logic gates. The reversibility of logic gates is an important aspect of quantum logic gates used in VLSI and quantum computing. Reversibility ensures that power consumption is minimized. This study explores the field of reversible logic and utilizes Peres gate to develop a full adder circuit that shows a significant reduction in power consumption in simulations performed in Xilinx Vivado. We have …
Published in Journal of VLSI Design Tools and Technology · Vol. 14, Issue 3, 2024 · pp. 32–38 Read article
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Verilog-Based Image Processing on Field Programmable Gate Arrays: Design and Implementation
Abstract: Integrated circuits known as Field Programmable Gate Arrays (FPGAs) are frequently offered for sale off the shelf. They are known as "field programmable" because, following manufacture, they enable users to modify the hardware to satisfy particular use case needs. This makes it possible to update features and correct bugs in-place, which is very helpful for remote deployments. Configurable logic blocks (CLBs) and a series of programmable interconnects are features of …
Published in Journal of Semiconductor Devices and Circuits · Vol. 11, Issue 3, 2024 · pp. 13–26 Read article
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VHDL-Based Strategies for Protecting IoT Devices from Power and Electromagnetic Side-Channel Attacks: A Study
Abstract: The environment of the Internet of Things (IoT) is rapidly developing, linking billions of devices across a wide variety of disciplines. Furthermore, despite the fact that it provides an unprecedented level of convenience and efficiency, this interconnection also presents a fertile ground for security weaknesses. Side-channel attacks, also known as SCAs, are one of the dangers that pose a considerable risk. These attacks specifically target the cryptographic implementations that are …
Published in Recent Trends in Electronics Communication Systems · Vol. 12, Issue 3, 2025 · pp. 30–40 Read article