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52 articles for “Binary comparator”
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Design of a Modified Low Power PTL based 64-Bit Comparator
Abstract: In this paper, we have presented comparison of modified and existing 64-bit binary comparator designs concentrating on power consumption, delay and PDP. Modifications are done in existing 64-bit binary comparator design to improve the PDP of the proposed design. The modified design have been performed by using PTL logic in existing 64-bit binary comparator design to improve the speed of the circuit. Comparison between modified and existing 64-bit binary comparator …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 2, Issue 3, 2014 · pp. 10–17 Read article
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Thermoacoustic Properties of 1-Propanol-n-Hexane and 1-Propanol-Cyclohexane Binary Mixtures: A Comparative Study at 298.15 K
Abstract: This study reports the measurement of ultrasonic velocity (U), viscosity (η), and density (ρ) for the binary liquid mixtures 1-propanol–n-hexane and 1-propanol–cyclohexane at 298.15 K over the full composition range (mole fraction 0.1–0.9). From the experimentally measured data, several important thermodynamic and acoustic parameters, including isentropic compressibility (βₐ), acoustic impedance, intermolecular free length, free volume (Vf), and internal pressure (πᵢ), were systematically derived to assess the magnitude and nature of …
Published in Journal of Modern Chemistry & Chemical Technology · Vol. 17, Issue 1, 2026 · pp. 19–31 Read article
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Comparative of Encryption-Decryption Performance of (Binary, Gray- Scale, Color) Images Using Discrete Fractional Fourier Transform (DFRFT)
Abstract: The Discrete Fractional Fourier transform (DFRFT) provides an effective model of image encryption by further developing the classic Fourier transform by adding fractional orders, which increase the degrees of freedom. Owing to the omnipresence of digital media in many industries like education, healthcare, and entertainment, the mobility of visual data has become a significant issue to keep confidential. Images form one of the main ways of exchanging information and, therefore, …
Published in Research & Reviews : Journal of Physics · Vol. 15, Issue 1, 2026 · pp. 54–65 Read article
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Traversal Speed Comparison of BFS and DFS in Balanced and Skewed Binary Trees
Abstract: In this paper, we provide an analysis of how well both breadth-first search (BFS) and depth-first search (DFS) algorithms perform while wandering through two kinds of binary trees: balanced and skewed. The research was motivated by the practical application of storing files and directories in a certain type of parent-child relationship through the use of hierarchical file systems (e.g., windows explorer). The result of measuring how fast and versatilely these …
Published in International Journal of Data Structure Studies · Vol. 4, Issue 2, 2026 Read article
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Speeding up Simultaneous Scalar Multiplication on Elliptic Curves
Abstract: Scalar multiplication is the basic and most expensive operation in elliptic curve based cryptographic protocols. It is the computation of integer multiple of a given point on the curve. Computation of scalar multiple is faster by using signed binary representation as compared to binary representation. Direct- recoding is a new and efficient algorithm for computation of signed binary representation as compared to the existing methods like NAF, MOF and complementary …
Published in Journal of Operating Systems Development & Trends · Vol. 1, Issue 3, 2014 · pp. 15–20 Read article
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Effects of Composition on Structure & Mechanical Property of TiAl Based Intermetallic Compounds
Abstract: The effects of Al content and ternary additions such as Mo, V and Si in as cast g based alloys made by plasma arc melting on solidification structures and mechanical properties were studied. The Columnar g /a2 lamellar structures in Al-lean alloys due to primary a solidification had higher room temperature fracture strength and strain than g phase structures through the reaction of L + a = g in Al-rich …
Published in Journal of Materials & Metallurgical Engineering · Vol. 11, Issue 3, 2021 · pp. 1–10 Read article
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A Simple, Compact, and Power-Efficient Current-Mode Decimal Adder Circuit
Abstract: A size and power efficient current-mode decimal adder is proposed in this paper. The proposed adder does not use binary coded decimal (BCD) number system for processing the decimal data like other decimal adders. Instead, it processes the decimal data as the actual decimal inputs. The proposed adder can be used as a decimal half adder as well as a decimal full adder. The adder is based on simple decimal …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 2, 2014 · pp. 18–23 Read article
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Binary GA for Sidelobe Reduction and Null Steering in 5G Array
Abstract: This paper presents a comprehensive performance evaluation of a Binary Genetic Algorithm (BGA) for optimizing radiation characteristics of an active phased array antenna used in fifth-generation (5G) wireless communication systems. The primary objective is to achieve effective null steering while maintaining the desired main beam direction and simultaneously reducing the side lobe level (SLL). These improvements are essential for minimizing co-channel interference, enhancing spatial selectivity, and improving the Signal-to-Interference-plus-Noise Ratio …
Published in International Journal of Radio Frequency Innovations · Vol. 4, Issue 2, 2026 Read article
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Design of High-Speed TIQ Comparator for Flash-Type ADC for (WPMOS/LPMOS) > 1
Abstract: Comparator is the circuit that compares an analog signal with the reference signal and produces the binary output based on comparison. A Comparator is the main block in the ADC design as it directly affects the conversion rate of an ADC. Depending on the type and architecture of the comparator, the comparator can have significant impact on the performance of the target application. The speed and resolution of an ADC …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 2, 2014 · pp. 47–52 Read article
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Defect Detection in Patterned Fabrics Using Local Binary Pattern and Its VLSI Implementation
Abstract: For texture classification in computer vision Local Binary Patterns (LBP) is used as one of the efficient method. In this paper, LBP texture operator is used to label the pixels of an image of any fabric or texture using the property of thresholding the neighborhood of each and every pixel and considers the compared result as a binary number or a digit which will be used for detecting the defects …
Published in Journal of Microcontroller Engineering and Applications · Vol. 1, Issue 1, 2015 · pp. 45–51 Read article
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Design and Simulation of Ternary Gates Using Fin-FET
Abstract: In recent years, digital communication system has becomes more popular. But the on-chip interconnections have become a major problem as more and more modules are packed into a chip by reducing the gate size. As the gate size is reduced further the complexities in the circuit increases. Binary logic circuit dissipates a lot of energy, increase processing time, and causes coupling effect. In the Ternary logic system, there are three …
Published in Journal of Semiconductor Devices and Circuits · Vol. 2, Issue 3, 2015 · pp. 4–18 Read article
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Real-time Implementation of Binary Mask Algorithm for Hearing Prosthetics
Abstract: As the current speech enhancement algorithms can give results for improved speech audibility only. So, our main motivation is to develop speech enhancement algorithm that would improve performance in speech for hearing impaired persons. In this paper, an algorithm is presented for improving speech intelligibility. Various speech enhancement algorithms were developed but only some of them can be used for real time hearing aid applications. This proposed algorithm can be …
Published in Journal of Microelectronics and Solid State Devices · Vol. 3, Issue 1, 2016 · pp. 36–42 Read article
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Half Adder Using Different Design Styles: A Review on Comparative Study
Abstract: AbstractA half adder is a digital logic circuit that performs addition of two single bit binary numbers. Generally, in various types of processors, adders are used to perform arithmetic and logical operations .In this paper, working of half adder is analysed by designing it by using three different logic styles, i.e., CMOS logic, Transmission Gate Logic (TGL) and Pass Transistor Logic (PTL). The comparison has been made between the circuits …
Published in Journal of Advancements in Robotics · Vol. 7, Issue 3, 2020 · pp. 26–32 Read article
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Facial Recognition System Based on Score-level Fusion of LBP and Gabor Feature Extraction Techniques
Abstract: Face recognition is gaining recognition over the last few decades. Nowadays, this technology is highly used in smartphones to unlock the phone by sensing the face of an individual. In our paper, we aim to maximize recognition rates by performing the score-level fusion of two feature extraction techniques: Local Binary Pattern (LBP) and Gabor features. These two techniques on fusion provide better recognition rates as compared to the recognition rates …
Published in Journal of Artificial Intelligence Research & Advances · Vol. 7, Issue 1, 2020 · pp. 10–14 Read article
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FPGA Implementation of Binary Integer Decimal based Floating Point Multiplier
Abstract: This paper presents the hardware design of an IEEE P754-2008 complaint multiplier which works on binary integer decimal (BID) encoded decimal floating point numbers. This design uses a single binary multiplier with carry save feedback for both significant multiplication and rounding. It further uses the Dadda or Wallace tree structure to accumulate the partial products. In this design carry select adders, carry look ahead adders and ripple carry adders are …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 3, 2015 · pp. 97–103 Read article
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Forest Sort: Implementation and Performance Analysis
Abstract: A new technique has been introduced for sorting a large number of data set. Technique is known as Forest sort. It comprises of 3 steps- (1) a forest of binary trees has been made using hashing (2) In order traversal of each tree has been carried out concurrently (3) Merge sort has been applied to the resulting lists in (2) in a concurrent manner. A comparison has also been made …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 1, Issue 1, 2013 · pp. 19–23 Read article
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Effect of Fiber Hybridization on Compressive Strength and Water Permeability of Steel Fiber Reinforced Concrete
Abstract: The paper presents results of an investigation conducted to study the compressive strength and water permeability of hybrid steel fiber reinforced concrete (HySFRC). Steel fibers of different lengths, i.e., 12.5, 25 and 50 mm having constant diameter of 0.6 mm were systematically combined in different mix proportions to obtain mono, binary and ternary combinations. Mixes with no fibers were also cast for comparison purpose. Three fiber volume fractions, i.e., 0.5, …
Published in Recent Trends in Civil Engineering & Technology · Vol. 4, Issue 1, 2014 · pp. 11–16 Read article
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GDI Logic Implementation of Variable Sized CSLA Architectures Using 45 nm SOI Technology
Abstract: Carry select adder (CSLA) is an efficient adder used in modern processors. But, the CMOS logic implementation at the transistor level makes it complex. The use of smaller transistor size has shrunk the overall design but the transistor count was retained. Hence, in this paper the transistor level implementation of variable sized CSLA architecture is done using gate diffusion input (GDI) logic. This implementation drastically simplifies the CSLA in terms …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 1, 2016 · pp. 78–88 Read article
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Improved Photocatalytic Activity for Removal of Methylene Blue Dye from Aqueous Solutions with La2O3-Modified Ceria Heterostructured Binary Oxide Nanocomposite Particles
Abstract: The current study aimed to examine the photocatalytic efficacy of a bimetallic CeO2-La2O3 hetero-NC in comparison to monometallic CeO2 and La2O3 nanoparticles (NPs), utilizing Methylene Blue (MB)as pollutant sample under natural solar and UV irradiation. The coprecipitation method was utilized to produce a bimetallic CeO2-La2O3 hetero-NC. Following this, the nanostructures underwent characterization through various techniques including FT-IR, FE-SEM, XRD, UV Vis- DRS, Raman, and Photoluminescence spectroscopy. The catalytic activity of …
Published in Journal of Polymer & Composites · Vol. 13, Issue 4, 2025 · pp. 514–532 Read article
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Area and Power Improvement with New Initial Ordering Method Combined with Sift Algorithm for BDD Mapped Circuits
Abstract: Digital circuits are the important elements in almost every electronic design. As the size of electronic ICs are shrinking rapidly, the minimization of the circuit elements and power consumption became more focused area of VLSI research. In this paper, we have introduced a new method for reduction of area and power of binary decision diagram mapped circuits. Binary decision diagrams are used to represent digital functions in VLSI CAD. It …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 2, 2018 · pp. 67–71 Read article