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9 articles for “7 nm technology”
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RTL-to-GDS Implementation of a High-Speed On-Chip 32:1 Serializer Using Open-Source Tools
Abstract: Exploring the RTL-to-GDS implementation of a high-speed on-chip 32:1 serializer, this study investigates the integration of open-source tools within VLSI design, emphasizing sustainable practices in the semiconductor industry while operating at the nanometer scale. Addressing methodologies for optimizing power consumption and chip area utilization, particularly focusing on efficient use of non-renewable resources. The study is set against the backdrop of advanced 7nm FinFET technology, critical for enabling efficient data transmission …
Published in Journal of VLSI Design Tools and Technology · Vol. 14, Issue 3, 2024 · pp. 1–10 Read article
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Implementation of STATIC-RANDOM-ACCESS-MEMORY-Based In-Memory Computing-architecture for improving Energy Efficiency
Abstract: The in-memory-computing architecture the improvement of big data and high-performance computing. In memory-computing (IMC) as reduces the latency and power consumption of data processing. Proposed research paper static random-access memory-based IMC architecture. By completing internal write-back, NMOS transistors increase computational efficiency and eliminate the need to read the computational output right away. A 128×128 STATIC-RANDOM-ACCESS-MEMORY-IMC macro chip is designed using the 78-nm technology. The energy efficiency of 55.3TOPS/W with supply …
Published in Journal of VLSI Design Tools and Technology · Vol. 15, Issue 1, 2025 · pp. 25–35 Read article
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Iron Ore Beneficiation through Reverse Flotation: Advances in Nanobubble-Assisted Flotation Technology for Lean Grade Ore Upgradation and Silica Removal: A Review
Abstract: The global demand for high-grade iron ore concentrates continues to surge as readily available rich ores become depleted. Iron ore beneficiation through froth flotation has emerged as a critical technology for upgrading lean-grade iron ores (typically 25–35% Fe) to produce high-quality concentrates (64–70% Fe) suitable for direct reduction and blast furnace operations. This comprehensive review examines the fundamental principles of flotation in iron ore beneficiation, with particular emphasis on the …
Published in International Journal of Minerals · Vol. 3, Issue 1, 2026 · pp. 1–30 Read article
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A Comprehensive Review on FinFet Technology : Advantages, Challenges and Applications
Abstract: New devices and enhanced layers have been developed, specially the FinFET (Fin Field-Effect Transistor) which is considerably superior to the planar transistor because of its ability to meet the new demands of systems for high-performance, low-power, and dimensions reduction. Some of the recent developments in FinFETs mentioned in this review include a reduction of leakage currents by 50% and an enhancement of the speed by 30%; thus, FinFETs remain fundamental …
Published in Journal of Semiconductor Devices and Circuits Read article
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Microwave-Assisted Synthesis of Li₃Ba₂Gd₃(MoO₄)₈ Phosphors Doped with Pr³⁺ and Sm³⁺ for High-Performance Red Emission in LED Applications
Abstract: In this study, we report the successful synthesis of Li₃Ba₂Gd₃(MoO₄)₈ (RE³⁺ = Pr³⁺, Sm³⁺) phosphors using a novel, microwave-assisted solid-state reaction method at ambient temperature. The synthesis involved the use of analytical grade reagents including Lithium Nitrate (LiNO₃), Barium Nitrate, Gadolinium Nitrate (Gd(NO₃)₃·6H₂O), Ammonium Molybdate ((NH₄)₆Mo₇O₂₄·24H₂O), and high-purity oxides of Praseodymium (Pr₂O₃) and Samarium (Sm₂O₃). The reagents were mixed in stoichiometric ratios, ground thoroughly in a pestle and mortar, and …
Published in Journal of Polymer & Composites · Vol. 13, Issue 1, 2025 · pp. 18–32 Read article
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Spintronic Logic Circuits for Ultrafast Processing
Abstract: Spintronic logic has emerged as one of the most promising post-CMOS paradigms capable of addressing the speed, density, and energy challenges of deeply scaled silicon technologies. By relying on the intrinsic properties of electron spin and magnetization dynamics, spintronic devices—particularly Magnetic Tunnel Junctions (MTJs), Spin-Transfer Torque (STT), and Spin–Orbit Torque (SOT) structures—enable ultrafast, non-volatile data processing with significantly reduced energy consumption. Despite remarkable device-level advancements, circuit- level realization of high-speed, …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 3, Issue 2, 2025 · pp. 35–43 Read article
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Bismuth-Doped CuGaS₂ Thin Films for Enhanced Photovoltaic and Electrocatalytic Performance
Abstract: This study presents the development and application of bismuth (Bi)-doped CuGaS₂ thin films for enhanced performance in photovoltaic and electrocatalytic systems. Using a cost-effective all-solution processing method, Bi-doped CuGaS₂ chalcopyrite nanocrystals were synthesized and spray-deposited onto molybdenum substrates. The resulting films, with a thickness of approximately 730 nm and grain sizes larger than 400 nm, exhibited superior optical properties and a lower band gap compared to undoped films, making them …
Published in Journal of Thin Films, Coating Science Technology & Application · Vol. 11, Issue 3, 2024 · pp. 01–07 Read article
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Machine Learning Assisted Optimization of Nanoscale MOSFET Parameters Using TCAD Simulation
Abstract: This paper presents a machine learning (ML) assisted framework for the multi-objective optimization of nanoscale bulk n-channel metal-oxide-semiconductor field-effect transistors (nMOSFETs) with a 10 nm physical gate length, high-k HfO₂ gate dielectric, and TiN metal gate. Technology computer-aided design (TCAD) simulations employing drift-diffusion transport, Shockley-Read-Hall recombination, Lombardi mobility degradation, and density- gradient quantum correction models are used to generate a parametric dataset of 2,400 device configurations spanning gate length (L), …
Published in Journal of Microelectronics and Solid State Devices · Vol. 13, Issue 1, 2026 · pp. 10–19 Read article
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Influence of Dielectric and Active layer Thickness on MgZnO Thin Film Transistor Electrical Characteristics
Abstract: From last decades, Thin Film Transistors Technology uses low-k dielectric material as an insulator. Insulator thickness plays an important role in device dimension. The insulating layer also known as the gate oxide separates the gate electrode from the channel region of the transistor. If the insulating layer is too thin, there is a greater chance that electrons can tunnel through the oxide layer, leading to leakage current. To mitigate this …
Published in Journal of Polymer & Composites · Vol. 11, Issue 5, 2023 · pp. 17–26 Read article