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204 articles for “comparator circuit”
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High-speed Data Converter Architectures: Latched Comparator Design & Performance Comparison
Abstract: This paper focuses on the design and optimization of latch comparators for high-speed data converter applications. The performance of different comparator architectures is compared in terms of speed, power consumption, and noise performance. The proposed latch comparator architecture uses a preamplifier to boost gain and sensitivity, and a latch to store the output signal. The latch comparator design is optimized for low power consumption and high speed, and is implemented …
Published in Journal of VLSI Design Tools and Technology · Vol. 14, Issue 1, 2024 · pp. 23–32 Read article
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Single Bit Low-Power High-Speed Full Adder
Abstract: This paper presents a high-speed low-power full adder cells that lead to have a reduced power-delay product (PDP). A comparison against other full-adder structure as having low PDP, in terms of speed, power consumption and area of cells is carried out. This paper contains, a hybrid 1-bit full adder design employing both complementary metal-oxide semiconductor (CMOS) and transmission gate logic styles. First implemented was the design for 1 bit then …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 55–60 Read article
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Single Bit Low-Power High-Speed Full Adder
Abstract: This paper presents a high-speed low-power full adder cells that lead to have a reduced power-delay product (PDP). A comparison against other full-adder structure as having low PDP, in terms of speed, power consumption and area of cells is carried out. This paper contains, a hybrid 1-bit full adder design employing both complementary metal-oxide semiconductor (CMOS) and transmission gate logic styles. First implemented was the design for 1 bit then …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 2, 2017 · pp. 55–60 Read article
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Simulation of Single Phase AC-DC Power Factor Corrected Converter: A Technological Review
Abstract: This paper is intended to review the significant development of power factor correction by using boost converter topology for single phase power supply to the load in the last decay. Contents in this review paper starts with an introduction of power factor correction by boost converter topology adopted by many industries. Different power factor correction methods are available, which can be applied to get better power factor and low harmonic …
Published in Trends in Electrical Engineering · Vol. 6, Issue 1, 2016 · pp. 72–83 Read article
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Modeling of In0.53Ga0.47As Quantum Dot Solar Cell
Abstract: AbstractQuantum dot solar cells have received tremendous attention for the next generation solar cell technology in the last decade. This paper exhibits the influence of In0.53Ga0.47As/GaAs quantum dots in a conventional p-i-n GaAs solar cell. The study reveals that insertion of In0.53 Ga0.47As/GaAs quantum dots in the p-i-n solar cell increases the short circuit current density as well as the overall conversion efficiency. When comparing a p-i-n cell with a …
Published in Journal of Semiconductor Devices and Circuits · Vol. 3, Issue 2, 2016 · pp. 27–31 Read article
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Proposed System: Quantum Computing Processor Based on Linear Number Relation
Abstract: This paper details the design and implementation of a specialized quantum processor tailored for efficiently evaluating custom mathematical formulas. Optimized to perform a specific set of arithmetic and logical operations, this processor delivers a stable and high-performance computing platform. Unlike general-purpose quantum processors, which are designed for versatility across a wide range of algorithms, this dedicated processor aims to enhance performance and accuracy for a targeted set of tasks. The …
Published in Recent Trends in Parallel Computing · Vol. 11, Issue 3, 2024 · pp. 24–32 Read article
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A Comprehensive Review of CMOS Analog Circuit Design Techniques for Low-Power VLSI Systems
Abstract: CMOS analog circuit design plays a significant role in the development of modern low-power Very Large-Scale Integration (VLSI) systems used in wireless communication, biomedical devices, portable electronics, embedded systems, and Internet of Things (IoT) applications. Research on low-power CMOS analogue design methodologies has intensified because to the growing need for high-performance, small, and energy-efficient electronic products. However, reducing power consumption while maintaining signal accuracy, noise performance, stability, bandwidth, and overall …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 4, Issue 1, 2026 Read article
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A review on Pole mounted GSM based circuit breaker
Abstract: At this modern age of technology-heavy machines working on live electric lines are more in numbers then compared to past few years. The fast development of electrical industries developed standards and established safety procedures to minimize various types of major hazards that may lead to severe injuries and death of the operators. However, if the scenario of the lines needs to be repaired that’s where the job will be endangered …
Published in Current Trends in Signal Processing · Vol. 11, Issue 1, 2021 · pp. 1–8 Read article
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Design of a Wireless Protection Scheme for Smart-Grid-Based Industrial Systems
Abstract: This paper illustrates the design of an alternative current measuring method which can be used for the protection of electrical machines, especially generators and motors, used in oil and gas industry. A comparison is made between the use of Hall effect sensors and current transformers for fault current detection. Also, different wireless communication methods that can be used in accordance with Hall effect sensors for detecting faulty conditions are discussed. …
Published in Journal of Power Electronics and Power Systems · Vol. 7, Issue 3, 2017 · pp. 30–37 Read article
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Delta Sigma Fractional N Frequency Synthesis
Abstract: Frequency synthesizers are fast becoming essential for several broadcast bands and circuits as communication technology hasimproved. To meet this need, the fractional N frequency synthesizer was created. This synthesizer has proven its supremacy as a noteworthyinnovation by permitting various improvements over comparable concepts. Only when it is combined with delta-sigma modulation is thispossible. This combi- national circuit enhances frequency resolution and noise performance. PLL-based frequency synthesis is often used toproduce …
Published in Journal of VLSI Design Tools and Technology · Vol. 13, Issue 2, 2023 · pp. 12–20 Read article
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Experimental and Simulated Analysis of Hybrid Auxiliary Energy Storage System for Electric Vehicles
Abstract: Electric mobility contributing to greater extent to balance the energy and power demands, energy storage unitsas well as environment safety for current automobile sector. Electric vehicle has major efficient features of zerocombustion, longer charging and discharging cycle which plays a vital role to replace the ongoing increase in price ofpetroleum fuels and its harmful effect son environment with their degrading store. Many non-conventional energysources like solar, tidal, wind etc. Can …
Published in Journal of Experimental & Applied Mechanics · Vol. 14, Issue 1, 2023 · pp. 23–40 Read article
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Time Domain Analysis in an On-chip High Speed RLCG Interconnection Network at 0.18 µm Technology
Abstract: In this model, the time domain waveform is evaluated for calculation of delay time, peak time, settling time, damping ratio and natural frequency for a second order RLCG interconnect network. It can also be used for multiple interconnect systems but for higher order systems it is ignored due to accurate analysis. The model is applied to a single resistance-inductance-capacitance-conductance model which can also be extended to multi-interconnect systems to analyze …
Published in Journal of VLSI Design Tools and Technology · Vol. 1, Issue 1-2-3, 2011 · pp. 57–67 Read article
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Networked Embedded Systems Eliminate Safety Hazards in Rail Journey
Abstract: ABSTRACT Introducing R&D into Rail transport is a good way to make sure that Railway decisions reflect the needs of passengers. Putting in place a foolproof security architecture and best brand components in the design of a safety system can ensure railway commutation in a high security environment. Managing security through proactive monitoring and event management is the key for achieving desired results. Safety and Punctuality — the two watch …
Published in Journal of Communication Engineering & Systems · Vol. 1, Issue 1-3, 2011 · pp. 34–43 Read article
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Carbon Nanotube Transistor Based Novel Ring Oscillator with Minimum Power Consumption at 32 nm Technology Node
Abstract: In this article an analysis of carbon nanotube field effect transistor based ring oscillator is performed. After analysis it was found that carbon nanotube transistor consumes less power in comparison to silicon transistor. CNFET is one possible candidate to substitute silicon-based integrated circuit (IC) technology, as the performance increase of conventional transistors witnessed during the last decades will arrive at its ultimate limits in the near future. Its present progress …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 51–54 Read article
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Carbon Nanotube Transistor Based Novel Ring Oscillator with Minimum Power Consumption at 32 nm Technology Node
Abstract: In this article an analysis of carbon nanotube field effect transistor based ring oscillator is performed. After analysis it was found that carbon nanotube transistor consumes less power in comparison to silicon transistor. CNFET is one possible candidate to substitute silicon-based integrated circuit (IC) technology, as the performance increase of conventional transistors witnessed during the last decades will arrive at its ultimate limits in the near future. Its present progress …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 2, 2017 · pp. 51–54 Read article
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Hybrid Quantum-Classical Reinforcement Learning Enabled Thermal-Aware Electronic Design Automation Framework for Energy-Efficient Next-Generation VLSI Systems Applications
Abstract: Modern Very Large-Scale Integration (VLSI) systems are becoming more complicated, which has increased need for sophisticated Electronic Design Automation (EDA) frameworks that can concurrently optimise thermal behaviour, power consumption, and performance. This study proposes a Hybrid Quantum-Classical Reinforcement Learning (HQCRL) Enabled Thermal-Aware EDA Framework for next-generation energy- efficient VLSI systems. The proposed framework integrates quantum-inspired optimization techniques with classical reinforcement learning algorithms to address the challenges of placement, routing, and …
Published in Journal of Electronic Design Technology · Vol. 17, Issue 2, 2026 · pp. 10–22 Read article
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Implementation and Analysis of Linear Electrical Networks using Interval Arithmetic on FPGA’s
Abstract: Interval arithmetic provides better method for monitoring and controlling errors in scientific calculations. Interval arithmetic can be used to obtain an analysis of linear electrical networks using hardware description language (HDL). In this paper the mean value theorem is used to analyze the circuits and implemented on hardware. The mean value theorem is applied for three different circuits i.e., for first order, second order and third order analog circuits. The …
Published in Current Trends in Signal Processing · Vol. 4, Issue 3, 2014 · pp. 14–21 Read article
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Review of Low Power Johnson Counter
Abstract: Due to the use of clock gating the authors have achieved a power reduction of 37.12 to 41.08% for different frequencies. The authors have run T-Spice simulations for conventional design and clock-gated Johnson counter design. There is a huge difference in the power consumption of the two designs. The clock-gating logic gives this change. And as a 2-input flip-flop is used instead of 3-input flip-flop plays a remarkable role in …
Published in Journal of Microelectronics and Solid State Devices · Vol. 2, Issue 1, 2015 · pp. 13–17 Read article
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Review Paper To Design a Low Power CNTFET Based XOR Gate
Abstract: The continuous scaling down of Silicon technology leads to various critical challenges and reliability issues such as short channel effect, high leakage current, interconnect problems, etc. CNTFET is the most probable substitutes to traditional MOSFET. The CNTFET device based circuits portray advantages with its better control over the device channel, reduced leakage current, reduced short channel effects. The CNTFET based XOR gate circuits incur the minimum power and energy dissipation. …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 1, 2018 · pp. 48–53 Read article
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A Cuckoo Search based Approach for Solving Standard Cell Placement Problem
Abstract: The standard cell placement (SCP) is an NP complete problem in VLSI layout which focuses on placing the cells at appropriate locations so as to minimize the resultant wirelength. The standard cell placement is one of the significant phases in VLSI circuit design. Many heuristic approaches have been developed in literature to solve this problem. The paper presents an efficient nature-inspired meta-heuristic algorithm for solving the standard cell placement problem …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 2, 2014 · pp. 1–7 Read article