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136 articles for “CMOS Circuit”
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Performance Comparison of Noise-Tolerant, High- Performance CMOS Domino Logic Configurations
Abstract: In high-performance VLSI chip design, domino logic configuration is often preferred over static logic due to its faster operation and smaller area footprint, especially in deep submicron (DSM) technology. However, DSM noise has become a significant challenge in domino-based circuits, leading to compromises in the reliability and signal integrity of integrated circuits (ICs). The switching threshold of domino logic, defined as the input voltage level at which the gate output …
Published in Journal of Semiconductor Devices and Circuits · Vol. 12, Issue 2, 2025 · pp. 35–50 Read article
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Design of Energy Efficient Clock System
Abstract: Energy efficiency is a key metric for energy constrained Ultra Low Power (ULP) VLSI applications such as wireless sensor nodes, pace makers, hearing aids etc. These applications need clock system in their signal processing and communication sub-system. Moreover, clock system plays a vital role in governing the reliability, power consumption and performance of synchronous system. In today’s era of portable electronics, power consumption has emerged as a forefront design metrics. …
Published in Journal of VLSI Design Tools and Technology · Vol. 9, Issue 2, 2019 · pp. 1–7 Read article
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Design of Single Bitline Novel 5T SRAM Cell to Reduce The Power Dissipation Using Cadence
Abstract: Fast growing field of IC technology is persistently demanding for low power consumption and efficient solution. Most of the available SRAM designs are based on standard 6T SRAM cell in addition to other circuit and transistors count. A novel 5T CMOS SRAM is presented in this paper, for simultaneously minimizing power consumption and an improving process speed. The presented unique 5T SRAM cell employs single bitline for read/write function. Implementation …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 1, 2016 · pp. 49–54 Read article
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Area Efficient Layout Design of Two Bit Magnitude Comparator Using Novel Strategy
Abstract: The development of digital circuits, digital signal processors and other data processing integrated circuits, comparators are challenged by large area consumption. Comparator is most basic and fundamental component that performs comparison operation. This paper proposes a new approach to design an area efficient two bit magnitude comparator. Comparison is done on the grounds of area and power consumed between circuit designed by novel strategy and preexisting CMOS technique. The novel …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 3, 2016 · pp. 1–6 Read article
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Comparative Analysis of High Speed Comparator for A to D Converters
Abstract: In this paper dynamic comparator along with the output buffer stage has been introduced. The simulation is carried out in 130 and 90 nm technologies. The supply voltage for 130 nm is 1.3 V and for 90 nm is 0.9 V. Different analyses for various characteristics of the comparator such as ICMR, delay, offset voltage and power dissipation is carried out in 130 and 90 nm CMOS technology. The comparator …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 2, 2015 · pp. 4–10 Read article
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Development of High Impedance Current Mirror Circuit With Its Implementation Using 0.18 μm Technology
Abstract: In this paper, “Development of High Impedance Current Mirror, based super wilson current mirror with both low input and output voltage requirements, along with high output impedance with no any extra biasing circuitry” is implemented. The implemented current mirror uses MOS current dividers to sample the output current to attain very high impedance with a large output and voltage range. A feedback action is used to force the input and …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 3, 2015 · pp. 87–96 Read article
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High Performance Multi-Valued Logic (MVL)Gate Design Using FinFET
Abstract: CMOS scaling faces challenges such as leakage, power dissipation, and short channel effects. Multi-Valued Logic (MVL) offers higher information density and reduced interconnections. This work presents a FinFET-based MVL gate design that improves electrostatic control, switching speed, and reliability. Simulation results confirm reduced leakage power and enhanced performance compared to conventional logic. The proposed architecture demonstrates scalability for advanced technology nodes. It also shows potential for low-power applications in portable …
Published in Journal of Microelectronics and Solid State Devices · Vol. 13, Issue 1, 2026 · pp. 34–45 Read article
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Implementation of DCC technique using differential amplifier based filter in 90nm CMOS technology
Abstract: Analog technique with feedback loop is applied to correct the duty cycle of any circuit without using more power. Pulse width modification is used to vary the duty cycle of clock signal. PMC cell is designed for expansion and contraction of pulse width. Differential amplifier based filter is used to detect the duty cycle of the particular clock signal. Differential amplifier and OpAmp are used to achieve adequate gain. The …
Published in Journal of VLSI Design Tools and Technology · Vol. 9, Issue 2, 2019 · pp. 13–22 Read article
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Design and Implementation of High-Speed Low Power Low Area Hybrid One Bit Full Adder Using CMOS Technology
Abstract: In this article, we'll take a look at a new kind of Full Adder (FA) design that mixes traditional Complementary Metal Oxide Semiconductors (CCMOS) with Pass Transistors (PTs) and Transmission Gates (TGs). To analyze the circuit's performance, we used the Mentor Graphics software package. Since all twenty (20) varieties of Full Adder circuits were able to be measured and compared, this research was conducted. When the clock rate of the …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 2, 2023 · pp. 29–39 Read article
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Comparison Analysis of Transformer Boosting and Induced Degeneration Topology Design of LNA for Millimeter Wave Frequency Range Using Polymeric Substrates
Abstract: In this study, a comparison between transformer boosting and source degeneration LNA topologies is conducted using two polymeric substrates—Polyimide (PI) and Liquid Crystal Polymer (LCP)—for millimeter-wave (mmWave) applications. With growing interest in flexible and high-frequency electronics, polymeric materials offer unique advantages such as low dielectric constants, mechanical flexibility, and thermal stability. The analysis explores gain, return loss, and noise figure performance while evaluating the influence of dielectric properties on the …
Published in International Journal of Electrical and Communication Engineering Technology · Vol. 3, Issue 2, 2025 · pp. 1–24 Read article
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Design of Fault Tolerant Reversible Comparator
Abstract: Reversible circuits have proved its significance in the synthesis of circuits having their important role in nanotechnology, quantum computing, low power CMOS Design, cryptography and Bioinformatics. The Reversible Gates can be further made more beneficial if they prove themselves to be Fault Tolerant i.e. where errors can be detected and corrected at the same time. This Paper considers parity preserving technique for making Reversible circuits Fault Tolerant. Parity Preserving Gates …
Published in Journal of Semiconductor Devices and Circuits · Vol. 6, Issue 2, 2019 · pp. 13–17 Read article
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Design and Simulation of Low Power Allow Area High Speed Carry Save Adder using CMOS 16 nm Technology.
Abstract: In this article, we propose a novel 1-bit hybrid full adder circuit that is implemented using eighteen transistors. Simulations are done using the Mentor Graphics Tool 16nm technologies. The performances are evaluated based on their speed, average power consumption, and power-delay product. The essential components of arithmetic units including compressors, comparators, parity checkers, etc. are full adders. Thus, raising the performance of the entire adder will raise the system's performance. …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 2, 2023 · pp. 17–28 Read article
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A High Performance Reference Circuit with Optimized Input Offset Operational Amplifier using Device Mismatch Model
Abstract: In this paper, author describes a band gap reference (BGR) circuit, having reference voltage 1.20V with maximum temperature coefficient of 63 ppm/0C in temperature range of –40 to 120 0C. The circuit operates in range of supply voltage, 3.0V to 3.6V. An operational amplifier (op-amp), whose input offset voltage is reduced upto 892 µV using Pelgrom’s device mismatch model is used in BGR. The power supply rejection ratio of circuit …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 1, 2013 · pp. 1–7 Read article
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Implementation and Simulation of High-Speed Dynamic Latch Comparator for ADC
Abstract: As per emerging issues in analog-mixed signal (AMS) design towards high-speed and low power, limits the performance of high-speed applications. Circuit complexity, speed, offset voltage and resolutions are essential parameter of comparator that affects the analog-to-digital converter (ADC) performance. Based on specifications, to achieve lower offset voltage and higher load drivability of latched comparator is presented. Moreover, the circuit is able to reduce power dissipation as the topology is based …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 2, 2016 · pp. 99–103 Read article
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Evaluation of OTA Amplifier Using EEG Signals
Abstract: AbstractOver the last few years, there has been a tremendous exploration in VLSI industries in response to scaling trends towards deep submicron technology. Demand for low power and efficient amplification are rising in day-to-day life. In the process of scaling the CMOS nanometer demand low supply, which is helped to design digital circuit realization at very low power consumption. But it is not valid for analog circuit realization. The related …
Published in Trends in Opto-electro & Optical Communication · Vol. 10, Issue 2, 2020 · pp. 5–14 Read article
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STUDY of MEMRISTOR MODELS and ITS APPLICATIONS in LOGIC CIRCUITS
Abstract: One significant area of nanotechnology is nanoelectronics. And a recent development in nanoelectronics is the discovery of the memristor, a fundamental circuit element. A memristor is essentially a nonvolatile nanoscale programmable resistor whose resistance, or memristance to be precise, is changed by applying a voltage across or current through, the device. Memristor has the potential to replace transistors in the digital circuit of upcoming days. Research is in full swing …
Published in Journal of Microelectronics and Solid State Devices · Vol. 1, Issue 1, 2015 · pp. 26–31 Read article
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Half Adder Using Different Design Styles: A Review on Comparative Study
Abstract: AbstractA half adder is a digital logic circuit that performs addition of two single bit binary numbers. Generally, in various types of processors, adders are used to perform arithmetic and logical operations .In this paper, working of half adder is analysed by designing it by using three different logic styles, i.e., CMOS logic, Transmission Gate Logic (TGL) and Pass Transistor Logic (PTL). The comparison has been made between the circuits …
Published in Journal of Advancements in Robotics · Vol. 7, Issue 3, 2020 · pp. 26–32 Read article
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High-speed CMOS ADCs Design
Abstract: This paper presents the design of high-speed subranging and flash analog to digital data converters (ADC) including the design of efficient operational amplifier to meet the performance requirements of these data converters for the specifications laid down targeted to the SCL 1.2 μm CMOS Foundry. The design starts from the specification of the circuit, its theoretical analysis for the parameter estimations of the transistors as well as the circuit’s design. …
Published in Journal of VLSI Design Tools and Technology · Vol. 2, Issue 1-2-3, 2012 · pp. 59–74 Read article
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Comparative Analysis of Combinational Circuit Using Reversible Logic Based Techniques
Abstract: In the last few decades, due to the ever growing demand for portable and small sized devices, integrated circuits require electronic circuit design methods to implement integrated circuits with low power consumption. The ever-growing number of transistors integrated on a chip and the increasing transistor switching speed in recent decades has enabled great performance improvement in computer systems by several orders of magnitude. Adiabatic logic technique is one of the …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 1, 2018 · pp. 30–33 Read article
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Design of CMOS AM Modem for Wireless Sensors
Abstract: A design of amplitude modulated (AM) modem, compatible to CMOS technology for its monolithic integration with either wireless microsensors or other sources of baseband signals, is presented in this paper operating in different frequency bands. Circuits functional in different operating conditions are considered in the paper to satisfy the requirement from low- to high-speed signals produced either from the wireless sensor or other signal source to be modulated on a …
Published in Journal of VLSI Design Tools and Technology · Vol. 2, Issue 1-2-3, 2012 · pp. 44–51 Read article