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59 articles for “Threshold voltage”
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Switched Capacitor-based RC Filter
Abstract: Today we know that the demand of low voltage for low power integrated circuits (ICs) are used for growing the portable equipment in all the markets including telecommunication, computers and customer electronics with smaller size. The low voltage need for ICs is also motivated by the new dip submicron complementary metal oxide semiconductor (CMOS) technology scaling that required all transistors of smaller size. In current years, a lot of researches …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 1, 2016 · pp. 32–40 Read article
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Wilson Current Mirror Based Energy Efficient Level Shifter
Abstract: AbstractLevel shifter plays a key role in modern electronics circuits in order to have higher efficiency. A circuit may contain parts that are working at two voltage levels. So a level shifter converts a subthreshold voltage level to a threshold voltage level. Multivoltage systems utilize the advantage of level shifters. Here, modified Wilson current mirror is used for obtaining level shifted output. Measurement results were demonstrated by using Cadence tools.Keywords: …
Published in Recent Trends in Electronics Communication Systems · Vol. 5, Issue 3, 2018 · pp. 32–37 Read article
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Performance Comparison of Noise-Tolerant, High- Performance CMOS Domino Logic Configurations
Abstract: In high-performance VLSI chip design, domino logic configuration is often preferred over static logic due to its faster operation and smaller area footprint, especially in deep submicron (DSM) technology. However, DSM noise has become a significant challenge in domino-based circuits, leading to compromises in the reliability and signal integrity of integrated circuits (ICs). The switching threshold of domino logic, defined as the input voltage level at which the gate output …
Published in Journal of Semiconductor Devices and Circuits · Vol. 12, Issue 2, 2025 · pp. 35–50 Read article
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A Comparative Analysis of Various Flipped Voltage Follower Cells
Abstract: Flipped voltage follower (FVF) cell is used for designing low-voltage/low-power analog circuits. It can operate with a single supply voltage, less than the sum of the threshold voltages of a PMOS and NMOS transistor. The three different configurations of the FVF cell namely conventional FVF, FVF using level shifter (FVFLS) and FVF using bulk driven technique (FVFBD) are presented. Various parameters such as input/output swing, gain, bandwidth and power dissipation …
Published in Journal of Microelectronics and Solid State Devices · Vol. 4, Issue 2, 2017 · pp. 1–8 Read article
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Numerical Simulation and Parameter Analysis for Pentacene based Organic thin Film Transistor with HfO2 Gate Dielectric
Abstract: This paper explains 2D numerical simulation and Characterization of Electrical parameter of Pentacene (Organic semiconductor) based Organic thin film transistor (OTFT) devices with HfO2 as a gate dielectric and Electrical parameters including; Threshold Voltage (Vt), Mobility (µ),Ion/Ioff, and Transconductance (gm), Sub threshold slope (SS) are extracted. The numerical simulation includes model for defect density of state and field dependent mobility model.
Published in Journal of Semiconductor Devices and Circuits · Vol. 6, Issue 2, 2019 · pp. 28–34 Read article
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Development of Polymer Based SRAM Cell with Enhance Low Power Performance
Abstract: Low-power memory technologies are in high demand with the rapid growth of portable electronics and energy-efficient computing systems. Static random-access memory (SRAM) plays a crucial role in processors, cache memories, and system-on-chip applications due to their speed and reliability. Static Random Access Memory (SRAM) is typically implemented using complementary MOS (CMOS) technology, which integrates both PMOS (P-channel Metal–Oxide–Semiconductor) and NMOS (N-channel Metal–Oxide–Semiconductor) transistors. However, as technology scales to deep submicron …
Published in Journal of Polymer & Composites · Vol. 14, Issue 1, 2026 · pp. 1439–1448 Read article
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Reconfiguring CMOS Driver and Receiver Pair as Pseudo NMOS for Low-swing Signaling On-chip Interconnects
Abstract: The Low power bus architecture [9, 12, 13] consists of Driver, Receiver and Interconnects in between them inside the Chip. The Low power bus architecture [1] models are classified in to Symmetric and Asymmetric [7, 11, 14, 15] based on low voltage scaling technique and very simple design principles were utilized to construct driver, receiver and interconnects. The low power bus driver has the ability to switch from a low …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 1, 2013 · pp. 20–27 Read article
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A Low Power Low Voltage High Performance CMOS Current Mirror with Improved Output Impedance
Abstract: The current mirrors are very useful in the designing of mixed mode and analog circuits. A high performance CMOS current mirror with high output impedance and a small power supply close to the threshold voltage of the transistor are presented in this paper. For achieving the high output impedance, an additional transistor is used at the output section of the current mirror. This additional transistor will improve the output impedance …
Published in Journal of Microelectronics and Solid State Devices · Vol. 3, Issue 1, 2016 · pp. 14–19 Read article
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Thermally Responsive Electroluminescence in ZnS: Mn Phosphors: Experimental Insights
Abstract: ZnS: Mn phosphors and thin film technologies have been used to create alternative current thin film light emitters. Establishing a precise model for these devices becomes challenging because they rely on frameworks that have a definitive effect on the final product, such as the size of the molecules used, the phosphor fabrication process, and the doping concentration, the purity of ZnS, the device structure, and so forth. The ZnS: Mn …
Published in Journal of Microelectronics and Solid State Devices · Vol. 10, Issue 2, 2023 · pp. 9–14 Read article
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A Dual Material Control Gate Tunnel Field Effect Transistor for an Asymmetric Doping at Source and Drain Regions
Abstract: Double-Gate tunnel FET devices, which uses high-κ gate dielectric, are explored using realistic design parameters, showing an ON-current as high as 0.23 mA, a gate voltage of 1.8 V, an OFF-current of not more than 1 fA (neglecting gate leakage), an improved ordinary subthreshold swing of 57 mV/dec, and a lower point slope of 11 mV/dec. A dual material control gate tunnel field effect transistor for an asymmetric doping at …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 3, 2018 · pp. 45–53 Read article
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Investigation of Electro-optical Characteristic and Structure Optimization of PMMA: Bepq2/BCP/Tpbi Blue Highly Efficient OLED Device
Abstract: In this Investigation, the energy level structure of the Spiro-MeOTAD/PMMA: Bepq2/BCP/Tpbi/LiF OLED has been investigated to explain the method of electron-hole charge carrier pair recombination and the light generation. The Maxwell-Boltzmann statistics model was applied to optimize the structure to reduce the band gap between conductive layers. We found the simulated results J–V, J-Illumination flux, and Current Efficiency (CE) characteristics when we applied forward bias. Inconclusive results determined the threshold …
Published in Journal of Polymer & Composites · Vol. 11, Issue 5, 2023 · pp. 56–68 Read article
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Design and Simulation of Low-power, High-speed Effective Area Mux Based One-bit Full Adder Using CMOS Technology
Abstract: Our findings reveal a novel kind of circuit capable of performing both XOR and XNOR operations in parallel. Power dissipation and delay are both greatly reduced in the proposed circuits due to their low output capacitance as well as minimal short-circuit power dissipation. We show six new hybrid 1-bit full-adder (FA) circuits that take use of the XOR-XNOR or XOR/XNOR gates' special full-swing function. Each potential circuit layout has both …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 1, 2023 · pp. 25–33 Read article
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An overview of Nanocrystalline Hydrogenated Silicon Thin film Transistor
Abstract: This article elaborates and comprehends an overview on nc-Si:H TFT's, detailing and highlighting the topics like fabrication methodology, properties/stability, modelling, characterization techniques, challenges and futuristic scope/applications.With the growing demands in commercialization of Solar Cells (low-cost photo voltaic devices), Large Area Displays (like OLED’s), Thin film electronics (FPD applications), pixel switches, wearable/flexible electronics and so on, has prompted researchers to develop nc-Si:H TFT's (an alternative solution) which can out perform the …
Published in Nano Trends – A Journal of Nano Technology & Its Applications · Vol. 27, Issue 2, 2025 · pp. 1–23 Read article
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Impact of Semiconductor Material Properties on Device Behavior and Circuit Performance: A Comprehensive Review
Abstract: Semiconductor materials play a fundamental role in determining the performance, efficiency, and reliability of modern electronic devices and circuits. This review presents a comprehensive analysis of how intrinsic and engineered material properties influence device behavior and overall circuit functionality. Key parameters such as bandgap energy, carrier mobility, thermal conductivity, and defect density are examined to understand their direct impact on switching speed, power consumption, and operational stability. The paper explores …
Published in Journal of Semiconductor Devices and Circuits · Vol. 13, Issue 1, 2026 Read article
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A Review of Electrical Conduction, Optical Sensing, and Semiconductor Device Innovations
Abstract: Electrical conduction and semiconductor device technologies form the backbone of modern electronic and sensing systems. This review presents a comprehensive analysis of conduction mechanisms across different materials, including conductors, semiconductors, and insulators, with particular emphasis on charge carrier behavior, resistivity, and energy band structures. The study highlights how variations in material properties and external conditions influence electrical performance and device efficiency. The paper further explores advancements in semiconductor devices, focusing …
Published in Journal of Semiconductor Devices and Circuits · Vol. 13, Issue 1, 2026 Read article
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Design and Optimization of Nano scale Double Gate SOI-MOSFET for Analog Applications Using SILVACO TCAD
Abstract: In this paper the structure effect on electrical characteristics of 60-nm double-gate Silicon-on-Insulator Metal-Oxide-Semiconductor Field Effect Transistor (DG-SOI-MOSFETs) is explored. These structures enable more aggressive device scaling in nano scale region because of their ability to control short channel effects. Established a scaling theory which gives guidance for the device optimization (Silicon film thickness Tsi (20nm); gate oxide thickness Tox (3nm); buried oxide thickness Tbox (200nm) and gate length LG …
Published in Journal of Electronic Design Technology · Vol. 1, Issue 1-3, 2011 · pp. 7–17 Read article
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Designing and Testing of various types of SRAM topologies with 90nm Technology
Abstract: VLSI technology provides a way for designing compact devices which are useful to human for leading their day to day, the advancement in the technology provides high speed and power consuming appliances. In this category, intend to design an application with high data rate and low power, memory efficient device and Static Random-Access Memory (SRAM) is structured. Improvement in the technology comprises of scaling down the design process and impact …
Published in Journal of Electronic Design Technology · Vol. 13, Issue 1, 2022 · pp. 12–16 Read article
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Power-Efficient Design Strategies for Static Random Access Memory with Memory Blocks: A Review
Abstract: For many years, CMOS technology has been able to achieve high integration density and great performance by scaling down its feature size and threshold voltage. Power consumption has been a major concern in VLSI design due to the ongoing drop in aspect ratio and the related improvements in chip density and operation frequency. SRAM is a type of random-access memory in which an interruption in power causes data loss. For …
Published in Journal of Microcontroller Engineering and Applications · Vol. 10, Issue 3, 2023 · pp. 23–32 Read article
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3D Simulation of Multi-Gate Mosfet Analysis for Analog Circuit Design Parameters
Abstract: Chip density and performance improvements of semiconductor devices have been driven by their aggressive scaling. The performance of multi-gate FET for analog applications is explored in this paper. Analog operation of CMOS devices and its parameters are very important for future cutting edge technologies. The multi-gate technology shows excellent scalability and better immunity to short channel effects in MOSFETs. They are being easily assessed for CMOS applications beyond the 45 …
Published in Journal of Semiconductor Devices and Circuits · Vol. 1, Issue 2, 2014 · pp. 1–8 Read article
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Low Power High Speed Eight-Transistor (8T) SRAM Cell with Enhanced Data Stability
Abstract: The demand of static random access memory cell in embedded memories is rapidly increasing. To design SRAM is continuously becoming difficult due to limitation of weaker write margin, degraded data stability and higher leakage power consumption. In order to overcome these limitations, new 8T SRAM has been explored. The simulation results depicts better data stability, low access delay and decreased leakage power consumption. Alternatively, proposed cell with sleep transistor and …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 35–44 Read article