Power Consumption
7 articles · search the full text for this term
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Design and Implementation of an Arduino-Based Wireless Power Consumption Monitoring and Control System
Abstract: The increasing demand for electricity and the inefficiencies associated with traditional metering systems necessitate the development of advanced solutions for monitoring and controlling power consumption. This study presents the design and implementation of an Arduino-based wireless power consumption monitoring and control system aimed at providing real-time feedback and efficient energy management. The system incorporates the Arduino Uno R3 microcontroller, ACS712 current sensor, relay module, and Ethernet shield to enable accurate …
Published in Trends in Electrical Engineering · Vol. 16, Issue 1, 2025 · pp. 19–31 Read article
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Development of Polymer Based SRAM Cell with Enhance Low Power Performance
Abstract: Low-power memory technologies are in high demand with the rapid growth of portable electronics and energy-efficient computing systems. Static random-access memory (SRAM) plays a crucial role in processors, cache memories, and system-on-chip applications due to their speed and reliability. Static Random Access Memory (SRAM) is typically implemented using complementary MOS (CMOS) technology, which integrates both PMOS (P-channel Metal–Oxide–Semiconductor) and NMOS (N-channel Metal–Oxide–Semiconductor) transistors. However, as technology scales to deep submicron …
Published in Journal of Polymer & Composites · Vol. 14, Issue 1, 2026 · pp. 1439–1448 Read article
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The Next Era of Solid-State Innovation: Beyond Silicon
Abstract: The semiconductor industry is getting close to the physical and economic boundaries of silicon-based technology. A new era of solid-state innovation is beginning. Beyond Silicon: The Next Era of Solid-State Innovation looks at the materials, device layouts, and manufacturing methods that are about to change the way electronics and energy work. The article talks about improvements in wide- and ultra-wide-bandgap semiconductors, two- dimensional materials, and quantum and neuromorphic systems that …
Published in International Journal of Solid State Innovations & Research · Vol. 3, Issue 2, 2025 · pp. 19–23 Read article
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A Comprehensive Review of FinFet Technology: Advantages, Challenges and Applications
Abstract: This has been complemented by improvements on the new layers that have surpassed the manufactures planar transistor by the new FinFET (Fin Field-Effect Transistor), which enhance modern demands on high performance, small size and low power consumption. This review is for a timely information on the latest development on FinFET technology, such as by curbing leakage currents by 50 percent and enhancing its speed by 30 percent proving that FinFETs …
Published in Journal of Semiconductor Devices and Circuits · Vol. 11, Issue 3, 2024 · pp. 1–12 Read article
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A Comprehensive Review on FinFet Technology : Advantages, Challenges and Applications
Abstract: New devices and enhanced layers have been developed, specially the FinFET (Fin Field-Effect Transistor) which is considerably superior to the planar transistor because of its ability to meet the new demands of systems for high-performance, low-power, and dimensions reduction. Some of the recent developments in FinFETs mentioned in this review include a reduction of leakage currents by 50% and an enhancement of the speed by 30%; thus, FinFETs remain fundamental …
Published in Journal of Semiconductor Devices and Circuits Read article
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Design of Optimized Full Adder using Noise-Mitigation Techniques and Power Gating
Abstract: With the advent of nanoscale technology, a new era of power consumption, speed, and reliability challenges for traditional static CMOS logic has begun. To solve these problems, dynamic logic families—particularly domino logic—have emerged as potent substitutes that offer quicker processing speeds and lower power consumption. The design and optimization of a full adder circuit using domino logic is shown in this study. A dynamic domino logic technique is used to …
Published in Journal of Microelectronics and Solid State Devices · Vol. 11, Issue 3, 2024 · pp. 1–6 Read article
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Design And Optimization Of High-Speed Array Multiplier
Abstract: An array multiplier is a digital circuit used for the rapid multiplication of binary numbers. It employs an array of logic gates to generate partial products concurrently, significantly enhancing speed. The array structure divides the multiplication task into smaller, parallel processes, allowing for efficient parallel processing of multiple bits. Each cell within the array manages specific bit-level multiplications, and their results are summed to produce the final product. This parallel …
Published in Journal of Microelectronics and Solid State Devices · Vol. 11, Issue 3, 2024 Read article