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270 articles for “interconnect”
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Delay Analysis for VLSI Interconnect’s Circuits
Abstract: This research work has been comprised of three parts. The first part deals with the implementation and estimation for the delay of an inverter and study of the influence of the delay variations with the increased size of the inverter. In this modern era of VLSI integrated circuits, interconnect’s delay majorly influences the device delay. The second phase of the work emphasizes on the realization of the interconnect delay and …
Published in Journal of Electronic Design Technology · Vol. 6, Issue 3, 2015 · pp. 25–32 Read article
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Thermally Adaptive Bio-Inspired VLSI Interconnect Model for Next-Generation Embedded Systems
Abstract: The increasing complexity of next-generation embedded systems has intensified the challenges associated with power dissipation, thermal instability, signal integrity, and interconnect reliability in Very Large- Scale Integration (VLSI) architectures. This research proposes a thermally adaptive bio-inspired VLSI interconnect model designed to enhance communication efficiency and thermal resilience in advanced embedded platforms. The proposed model integrates bio-inspired adaptive routing principles with dynamic thermal-aware interconnect management to optimize data transmission under varying …
Published in Journal of VLSI Design Tools and Technology · Vol. 16, Issue 2, 2026 · pp. 1–11 Read article
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Signal Integrity Analysis of Single Walled Carbon Nano Tube based Interconnects at 32 nm Technology Node
Abstract: The rising demands for ultra-high-speed processors and portable devices have made the transistor and interconnect scaling a challenging issue in present days. In this work, the impedance parameter of copper and CNT based interconnects are calculated at 32 nm technology node for different lengths. The performances of CNT based interconnects are analyzed and compared with Cu based interconnects in terms of crosstalk. The conventional copper interconnects are not able to …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 1, 2018 · pp. 33–42 Read article
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Time Domain Analysis in an On-chip High Speed RLCG Interconnection Network at 0.18 µm Technology
Abstract: In this model, the time domain waveform is evaluated for calculation of delay time, peak time, settling time, damping ratio and natural frequency for a second order RLCG interconnect network. It can also be used for multiple interconnect systems but for higher order systems it is ignored due to accurate analysis. The model is applied to a single resistance-inductance-capacitance-conductance model which can also be extended to multi-interconnect systems to analyze …
Published in Journal of VLSI Design Tools and Technology · Vol. 1, Issue 1-2-3, 2011 · pp. 57–67 Read article
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Analysis of Signal Delay in Carbon Nano Tube based Interconnects at 32 nm Technology Node
Abstract: AbstractIn the present world demand for portable devices and high speed processor is rising which brings out a challenging issue of scaling for designers. In this paper, we have presented the effect of copper and CNT based interconnects for different length at 32 nm technology node. The performance of both types of interconnects are analyzed and compared in form of propagation delay. Propagation delay in interconnects between the elements is …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 1, 2018 · pp. 20–26 Read article
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Modelling of Skin Effect in On-Chip VLSI RLC Global Interconnect
Abstract: This paper addresses one of the aspects of the high frequency effects, namely the skin effect. The basicproblem with skin effect is that it attenuates the high frequency components of a signal more than that ofthe low frequency components. Due to the increase in operating frequency and die sizes, RC models arebecoming insufficient for analysis of global VLSI interconnects. Accurate noise modelling for RLC lines isthus critical for timing and …
Published in Journal of VLSI Design Tools and Technology · Vol. 1, Issue 1-2-3, 2011 · pp. 31–44 Read article
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Performance Analysis of Combined Application of FACTS and HVDC Parallel Tie-Line for Interconnection and Synchronization of Large Thermal Power Grid
Abstract: This research work shows the working principle of two combined cases and application of flexible AC transmission system tie-line and high voltage direct current tie-line for interconnection and synchronization of two large thermal power grid system of 12 areas when load disturbance occurred in power grid-1 ΔPL6 = 0.01 pu. This research work is done with two interconnected linear, conventional and traditional thermal power grid system of 12 areas accepted …
Published in Journal of Power Electronics and Power Systems · Vol. 7, Issue 3, 2017 · pp. 1–16 Read article
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A Novel Approach Based On-Chip High Speed Optical Interconnection Network
Abstract: On-chip optical interconnects (OIs) have the potential to outperform electrical wires and to ultimately solve the communication problem and obtain high-performance integrated circuits. On-chip interconnects are an important performance limiting factor in present day VLSI design. Performance optimization has always been a critical step in the designing of integrated circuits. In this paper, an optical interconnect in 1550 nm range is being implemented using opti-system software. A novel approach is …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 1, 2017 · pp. 41–48 Read article
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Parallel and Concurrent Computing with Shell Commands: Exploring CPU Architecture, LAN Interconnection and Command Languages for Green Sustainability
Abstract: Parallel and concurrent computing are essential ways of thinking in the digital age, where the cost indexes are efficiency, speed and sustainability. By far performance relevance of each metaphor Contemporary computational environments covering everything from dumb terminals to distributed workstations and intelligent network systems such as the command-line interface (CLI) can never do well on its performance when throughput is needed most the era's fact that there is no hitting …
Published in Journal of Advances in Shell Programming · Vol. 12, Issue 3, 2025 Read article
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A Time Domain Analysis on Chip High Speed VLSI Optical Interconnection Network
Abstract: Intrachip optical interconnects (OIs) have the potential to outperform electrical wires and to ultimately, solve the communication problem, and to obtain high-performance integrated circuits. In this study, the International Technology Roadmap for Semiconductors (ITRS) is used as a reference to fulfill the requirements of silicon-based ICs must satisfy to successfully perform copper electrical interconnects (IEs). Keywords: Integrated optoelectronic circuits, optoelectronics, optical interconnects (ICs), silicon photonicsCite this ArticleAbhishek Sharma, Sudhir Kumar …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 3, 2018 · pp. 36–44 Read article
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Reconfiguring CMOS Driver and Receiver Pair as Pseudo NMOS for Low-swing Signaling On-chip Interconnects
Abstract: The Low power bus architecture [9, 12, 13] consists of Driver, Receiver and Interconnects in between them inside the Chip. The Low power bus architecture [1] models are classified in to Symmetric and Asymmetric [7, 11, 14, 15] based on low voltage scaling technique and very simple design principles were utilized to construct driver, receiver and interconnects. The low power bus driver has the ability to switch from a low …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 1, 2013 · pp. 20–27 Read article
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An Explicit Approach to Compare Crosstalk Noise and Delay in VLSI RLC Interconnect Modeled with Skin Effect with Step and Ramp Input
Abstract: As the technology is acquiring frequency of the Giga-hertz range noise and delay calculations andavoidance of such factors in VLSI interconnects have become dominant to be considered. This paperrepresents a comparison between the crosstalk noise voltage level measured when the RLC on-chipinterconnect was modeled when the skin effect was considered under step input and the crosstalk voltagemeasured when the RLC line was modeled with skin effect under ramp input. In …
Published in Journal of VLSI Design Tools and Technology · Vol. 1, Issue 1-2-3, 2011 · pp. 1–8 Read article
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A New Methodology for Reliability Analysis of Interconnected Power System by using Improved Genetic Algorithm
Abstract: Reliability of interconnected power system is an important parameter in power system analysis. Reliability of power system is measured by reliability indices. Analysis of reliability indices of interconnected power system is usually based on contingency enumeration approach or statistical approach. These methods have some limitations. Moreover, for large systems, these methods are not applicable. In this paper, an improved genetic algorithm based method is described for reliability indices calculation of …
Published in Trends in Electrical Engineering · Vol. 5, Issue 3, 2015 · pp. 109–113 Read article
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FDTD-based Time Domain Analysis of CMOS Gate Driven Interconnects
Abstract: Accurate time domain analysis of CMOS gate driven interconnects is important for the design and analysis of high performance VLSI systems. Conventionally, CMOS driver is approximated as a constant resistance instead of non-linear and time-varying MOS resistance, which causes inaccurate modeling of CMOS driver. This paper presents a new method for FDTD-based transient analysis of CMOS gate driven interconnect line using a generalized model. The generalized model of CMOS inverter …
Published in Journal of Electronic Design Technology · Vol. 5, Issue 1, 2014 · pp. 16–21 Read article
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Comparative Study on Optimal Frequency Control of Interconnected Hybrid Microgrid based mini VPP using PSO and SSA
Abstract: This work proposed the optimal load frequency control of an interconnected hybrid microgrid based mini virtual power plant (VPP) by comparing the responses using particle swarm optimization (PSO) and salp swarm algorithm (SSA). Initially, a hybrid microgrid is proposed with solar PV, wind and diesel based generators, supplying critical loads along with some controllable loads like heat pump and plug-in hybrid electric vehicles. Then it was interconnected to the main …
Published in Journal of Mobile Computing, Communications & Mobile Networks · Vol. 7, Issue 1, 2020 · pp. 7–15 Read article
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Effect of Inter Shell Spacing on Performance of MWCNT Bundle at 100 µm Interconnect Length
Abstract: This paper introduces the aspects of the utilization of Multi Wall Carbon Nanotube (MWCNT) as VLSI interconnects. The equivalent impedance parameters are figured concerning inter-shell spacing for L=100 µm and examination through diagrams are demonstrated. The delay and power dissipation of MWCNT with changing inter shell spacing have additionally been mimicked for ideal driver size and ideal number of repeaters at 32 nm, 22 nm and 16 nm technology nodes, …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 3, 2015 · pp. 71–79 Read article
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Proposed Modified PID Load Frequency Controller for Two Area Interconnected System Employing Frequency Regulation Techniques of Wind Power Plant
Abstract: AbstractFrequent switching of load introduces noisy ambiances and makes the implementation of conventional PID controller challenging, as differential part of controller is noise sensitive. Thus, this paper proposes a modified PID load frequency controller for two area interconnected system, employing frequency regulation techniques of wind power plant, and compares the performance of modified PID load frequency controller with the conventional PID controller. Wind power plant with inertial control has been …
Published in Journal of Alternate Energy Sources & Technologies · Vol. 8, Issue 2, 2017 · pp. 1–10 Read article
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Online State Estimation and Fault Detection of a Doubly Fed Induction Machine by an Interconnected High Gain Observer
Abstract: This article presents the states and disturbance estimation of a doubly fed induction machine by the use of an interconnected high gain observer. The supply is made of a rectifier, a filter and an inverter. We consider the parameters such as the load couple, the electromagnetic couple and the speed on the only basis of the electric quantities. The results show that the error between the estimated and measured parameters …
Published in Journal of Control & Instrumentation · Vol. 8, Issue 3, 2017 · pp. 1–11 Read article
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Optimal Capacity of Pump Storage System for Standalone Green Microgrid Interconnection with Main Grid in Deregulated Power Sector
Abstract: The energy crisis requires more generation capability, and is more importance to the storage technologies. To overcome this shortage of energy, pump storage system is used in the power system with great storing capacity up to this time. The isolated or regional grid in remote areas probably depends on renewable power sources such as wind; solar, geothermal, tidal, etc. with its availability is the main power resources. It is quite …
Published in Journal of Power Electronics and Power Systems · Vol. 6, Issue 2, 2016 · pp. 100–114 Read article
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MATLAB Simulation of Battery Interconnection with PV Panels for Standalone Solar Plant
Abstract: In this paper we have shown interconnection of battery and standalone solar PV plant. Varying solar incident radiation during whole day creates a problem of demand and supply mismatch in standalone solar PV plant. Standalone plant often refers to islanding mode of operation of solar PV plant. To overcome this problem we came up with a solution to interconnect battery with solar PV plant. So in excess power generation state …
Published in Trends in Electrical Engineering · Vol. 11, Issue 1, 2021 · pp. 8–13 Read article