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19 articles for “CMOS transistor”
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An Efficient Counter Using Modified Upper and Lower SVL Techniques and TSPCL
Abstract: Low power VLSI has emerged as the fundamental building block of the modern electronic era. This leads to a substantial paradigm shift where both power dissipation, performance and area of utmost importance. In the earlier time of fabrication, power dissipation was mainly neglected due to low device density and low operating frequency needed for computation. But in modern technological era, the need for high device density, higher operating frequency, proliferation …
Published in Research & Reviews : Journal of Physics · Vol. 13, Issue 2, 2024 · pp. 37–43 Read article
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Design and Implementation of Low-power SPI Shift Register
Abstract: SPI stands for serial peripheral interface which is used for serial, synchronous and full duplex communication of data between master and slave devices. Master devices can be Microprocessors or Microcontrollers; and slaves are the Peripheral devices interfaced with them. The main internal component for architecture of master/slave block is shift register which defines its operation. But as the size of the shift register increases, power is utilized to a greater …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 1, 2023 · pp. 1–15 Read article
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Design and Simulation of Full Adder-Based CMOS 4-2 Compressor using CMOS XOR-XNOR Logic
Abstract: This study utilizes the recent development of CMOS transistors to construct an energy-efficient Full adder-based CMOS 4-2 compressor. The CMOS Exclusive-OR-Exclusive-NOR component and multiplexer used in the transmission logic of the novel CMOS compressor include eight transistors. The XOR-XNOR logic style is the most efficient and effective due to its speed and reduced power consumption. Utilizing an operational supply voltage of 0.7 V and 90nm CMOS technology, the Cadence Virtuoso …
Published in Recent Trends in Electronics Communication Systems · Vol. 12, Issue 3, 2025 · pp. 1–8 Read article
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Design and Simulation of LNA in 90 nm CMOS Technology for Radio Receiver using the Cadence Simulation Tool
Abstract: Due to its successful operation in the 2.4 GHz frequency region, often known as the ISM (Industrial, Scientific, and Medical) band, RFICs play a vital role in communication systems. The major parts being used transceivers for frequency translation and amplification are LNA and Mixers. Different types of mixers and LNAs are employed, and different strategies are used to optimize them. In this paper an approach for design and simulation of …
Published in International Journal of Digital Communication and Analog Signals Read article
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Design and Simulation of Low-power, High-speed Effective Area Mux Based One-bit Full Adder Using CMOS Technology
Abstract: Our findings reveal a novel kind of circuit capable of performing both XOR and XNOR operations in parallel. Power dissipation and delay are both greatly reduced in the proposed circuits due to their low output capacitance as well as minimal short-circuit power dissipation. We show six new hybrid 1-bit full-adder (FA) circuits that take use of the XOR-XNOR or XOR/XNOR gates' special full-swing function. Each potential circuit layout has both …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 1, 2023 · pp. 25–33 Read article
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Design and Simulation of Low Power Allow Area High Speed Carry Save Adder using CMOS 16 nm Technology.
Abstract: In this article, we propose a novel 1-bit hybrid full adder circuit that is implemented using eighteen transistors. Simulations are done using the Mentor Graphics Tool 16nm technologies. The performances are evaluated based on their speed, average power consumption, and power-delay product. The essential components of arithmetic units including compressors, comparators, parity checkers, etc. are full adders. Thus, raising the performance of the entire adder will raise the system's performance. …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 2, 2023 · pp. 17–28 Read article
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Design and Implementation of High-Speed Low Power Low Area Hybrid One Bit Full Adder Using CMOS Technology
Abstract: In this article, we'll take a look at a new kind of Full Adder (FA) design that mixes traditional Complementary Metal Oxide Semiconductors (CCMOS) with Pass Transistors (PTs) and Transmission Gates (TGs). To analyze the circuit's performance, we used the Mentor Graphics software package. Since all twenty (20) varieties of Full Adder circuits were able to be measured and compared, this research was conducted. When the clock rate of the …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 2, 2023 · pp. 29–39 Read article
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Development of Polymer Based SRAM Cell with Enhance Low Power Performance
Abstract: Low-power memory technologies are in high demand with the rapid growth of portable electronics and energy-efficient computing systems. Static random-access memory (SRAM) plays a crucial role in processors, cache memories, and system-on-chip applications due to their speed and reliability. Static Random Access Memory (SRAM) is typically implemented using complementary MOS (CMOS) technology, which integrates both PMOS (P-channel Metal–Oxide–Semiconductor) and NMOS (N-channel Metal–Oxide–Semiconductor) transistors. However, as technology scales to deep submicron …
Published in Journal of Polymer & Composites · Vol. 14, Issue 1, 2026 · pp. 1439–1448 Read article
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Performance Comparison of Noise-Tolerant, High- Performance CMOS Domino Logic Configurations
Abstract: In high-performance VLSI chip design, domino logic configuration is often preferred over static logic due to its faster operation and smaller area footprint, especially in deep submicron (DSM) technology. However, DSM noise has become a significant challenge in domino-based circuits, leading to compromises in the reliability and signal integrity of integrated circuits (ICs). The switching threshold of domino logic, defined as the input voltage level at which the gate output …
Published in Journal of Semiconductor Devices and Circuits · Vol. 12, Issue 2, 2025 · pp. 35–50 Read article
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Ferroelectric Materials for Next-Generation Non-Volatile Memory Applications
Abstract: The continuous scaling of conventional memory technologies is increasingly constrained by limitations in power consumption, speed, endurance, and integration density. As data-intensive applications such as artificial intelligence, Internet of Things, and edge computing demand fast and energy-efficient memory solutions, alternative non-volatile memory technologies have gained significant attention. Ferroelectric materials, characterized by their reversible spontaneous polarization, offer a promising pathway toward next-generation non-volatile memory due to their intrinsic non-volatility, low operating …
Published in Journal of Microelectronics and Solid State Devices · Vol. 13, Issue 1, 2026 · pp. 1–9 Read article
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Physics of Semiconductors and Electronic Circuits
Abstract: This study talks about the basic ideas behind semiconductor physics and how important they are for making and running modern electronic circuits. It starts with a look at intrinsic and extrinsic semiconductors, going into how charge carriers move, energy band theory, and how doping affects how well the electricity flows. Next, the conversation turns to semiconductor devices like diodes, bipolar junction transistors (BJTs), and field-effect transistors (FETs). The focus is …
Published in Journal of Semiconductor Devices and Circuits · Vol. 12, Issue 2, 2025 · pp. 9–17 Read article
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Delay Analysis of HS-14T 45nm CMOS SRAM with Different SRAM Techniques for Improvement in Speed
Abstract: This paper presents a novel HS-14T design aimed at significantly improving read and write delays compared to conventional 6T and other memory cells RHRD-12T, SEUH-12T, and NHRC-14T. As technology scales, the demand for faster and more stable memory cells becomes increasingly critical. Our proposed HS-14T incorporates additional transistors to enhance stability and reduce access times, resulting in notable performance gains. Comprehensive simulations reveal that the HS-14T SRAM cell substantially reduces …
Published in Journal of VLSI Design Tools and Technology · Vol. 14, Issue 2, 2024 · pp. 1–13 Read article
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CMOS-Based Process-Scalable Analog Circuits for Machine Learning: A Comprehensive Review and Future Directions.
Abstract: Analog computing techniques are gaining attention for machine learning (ML) applications due to their ability to reduce computational complexity. Continuous operations such as addition and subtraction offer a simpler and more efficient approach compared to probabilistic product decoding, which can be sensitive to noise and inconsistent measurements. This paper presents a simulated VLSI implementation of a broadcast edge connection, independent of the MOS component model, along with experimental results. The …
Published in Journal of VLSI Design Tools and Technology · Vol. 15, Issue 1, 2025 · pp. 8–17 Read article
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A Study on Polymer-Based FinFET Applications and Logic Circuit Implementation with FinFET
Abstract: Nano devices play a crucial role in the semiconductor industry and can work as the solution for the problems like scaling of MOSFET. The FinFET can serve as the substitute of bulk CMOS in nanoscale. It mainly consists of two gate terminals which can be either shorted or kept independent.The shorted gate (SG-FinFET) configuration provides higher Ion and Ioff whereas the Independent Gate (IG-FinFET) configuration reduces the transistor count and …
Published in Journal of Polymer & Composites · Vol. 13, Issue 1, 2025 · pp. 312–340 Read article
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An Overview on MOSFET based Sensor Design
Abstract: In the past two decades the MOSFET has transformed from a simple switch in digital logic to an analog powerhouse that can be cofabricated with the sensing material on a single chip. MetalOxideSemiconductor FieldEffect Transistors (MOSFETs) have silently become the beating heart of modern sensor platforms, translating the faint whispers of physical, chemical, and biological phenomena into robust electrical signatures. This abstract surveys the latest advances that have turned the …
Published in Journal of Microelectronics and Solid State Devices · Vol. 13, Issue 1, 2026 · pp. 20–26 Read article
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A High Frequency and Power Efficient Memristor Emulator and Its Application
Abstract: This study presents a small, energy-efficient memristor emulator made for use at high frequencies. The proposed circuit has a simple design that only includes three n-type MOSFETs and a grounded capacitor. This means that there is no need for active components or DC biasing. This streamlined architecture not only makes things easier, but it also uses very little power, with dynamic and static power measured at 15.82 μW and 65.6 …
Published in International Journal of Electrical and Communication Engineering Technology · Vol. 3, Issue 2, 2025 · pp. 45–52 Read article
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A Review of Electrical Conduction, Optical Sensing, and Semiconductor Device Innovations
Abstract: Electrical conduction and semiconductor device technologies form the backbone of modern electronic and sensing systems. This review presents a comprehensive analysis of conduction mechanisms across different materials, including conductors, semiconductors, and insulators, with particular emphasis on charge carrier behavior, resistivity, and energy band structures. The study highlights how variations in material properties and external conditions influence electrical performance and device efficiency. The paper further explores advancements in semiconductor devices, focusing …
Published in Journal of Semiconductor Devices and Circuits · Vol. 13, Issue 1, 2026 Read article
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Performance and Analysis of 6T, 8T & 10T SRAM Cell in 28nm Technology
Abstract: Technology scaling into deep sub-micron regimes has significantly increased the design challenges of Static Random Access Memory (SRAM), particularly at the 28 nm technology node. As transistor dimensions shrink, SRAM cells become more vulnerable to stability degradation, leakage current, process variations, and reduced noise margins, which adversely affect overall memory performance and reliability. The conventional 6T SRAM cell remains widely used due to its compact structure and high storage density; …
Published in Journal of VLSI Design Tools and Technology · Vol. 16, Issue 2, 2026 Read article
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The Next Era of Solid-State Innovation: Beyond Silicon
Abstract: The semiconductor industry is getting close to the physical and economic boundaries of silicon-based technology. A new era of solid-state innovation is beginning. Beyond Silicon: The Next Era of Solid-State Innovation looks at the materials, device layouts, and manufacturing methods that are about to change the way electronics and energy work. The article talks about improvements in wide- and ultra-wide-bandgap semiconductors, two- dimensional materials, and quantum and neuromorphic systems that …
Published in International Journal of Solid State Innovations & Research · Vol. 3, Issue 2, 2025 · pp. 19–23 Read article