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158 articles for “complementary”
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Analysis and Characterization of Circuits for Leakage Power Reduction at Sub-50 nm in CMOS Circuits
Abstract: This paper analyzes various techniques to decrease leakage power in complementary metal oxide semiconductor (CMOS) very large scale integration (VLSI) circuits, because due to continuous scaling of CMOS technology there is improvement in speed of semiconductor devices and the side effect of this scaling is leakage power. With the development of technology in CMOS VLSI Circuit, length of transistors has been reduced and speed of operation is increasing simultaneously. As …
Published in Journal of Electronic Design Technology · Vol. 13, Issue 2, 2022 · pp. 11–22 Read article
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Optimization of Machining Parameters for Minimum Surface Roughness Indicators during the Turning of AISI 316 L Stainless Steel
Abstract: Turning is the most common process associated with the production of cylindrical shapes because of its simplicity, rapidity and economy. However, it is one of the most complex cutting processes. Turning is considered to be a complementary process of other more important processes, and yet 70% of the generated chip comes from this cutting technique. Quality plays important role in manufacturing industry. In on-line quality control, controller is provided with …
Published in Journal of Mechatronics and Automation · Vol. 7, Issue 1, 2020 · pp. 24–30 Read article
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Swing Restored Low Power and Area Efficient 8-bit Arithmetic Logic Unit Using Modified Gate Diffusion Input Technique
Abstract: AbstractThe arithmetic logic unit (ALU) is one of the most fundamental operational units in any processor. The ALU is the heart of any system or any processor and the core component of the central processing unit because mainly all the fundamental operations are performed by the help of ALU only. So, it can be defined as the combinational unit that is used to perform its logical and arithmetic units. The …
Published in Journal of Microcontroller Engineering and Applications · Vol. 5, Issue 2, 2018 · pp. 19–29 Read article
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Simulation and Analysis of S-CSRR PIFA for C-band 5G wireless networks
Abstract: In this paper, S-CSRR (Square-Complementary Split Ring Resonator) Planar Inverted F Antenna model is designed and simulated in the HFSS software. For compact and portable devices being preferred in 5G technology, the proposed antenna is helpful. The PIFA antenna with metamaterials (MTM) is beneficial for 4G and 5G wireless communication applications and covers C-band frequencies. The C-band frequency range of 3300-4200 MHz and 4400-5000 MHz is used in the research. …
Published in Journal of Microwave Engineering and Technologies · Vol. 9, Issue 2, 2022 · pp. 15–25 Read article
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Characterisation of FSW Joints of Aluminium and Titanium Alloys: A Review
Abstract: AbstractThis paper presents a review on friction stir welding of different aluminum and titanium alloys. Aluminum alloys are most widely used in automotive, aerospace and ship building industries as high strength-to-weight ratio materials. Titanium alloys are also attractive in these fields due to their high specific strength and good corrosion resistance. In some special applications, the complementary characteristics of Ti and Al are required, such as increased strength, low weight …
Published in Journal of Materials & Metallurgical Engineering · Vol. 8, Issue 3, 2018 · pp. 25–29 Read article
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Design and Performance Analysis of Full Adder Cell using FinFET Technique at 32nm Technology
Abstract: AbstractIn this paper, discussed is the comparative analysis of complementary MOS (CMOS) and dual gate-FinFET (fin shaped field effect transistor) based full adder cell design. To reduce the average power, average current and maximum current of 1-bit full adder circuit a new high DG-FinFET technique is presented. Use of double-gate FinFET technology provides low leakage and high performance operation. For MOSFET transistor model, a predictive technology model (PTM) BSIM4 and …
Published in Journal of Microelectronics and Solid State Devices · Vol. 4, Issue 3, 2017 · pp. 1–8 Read article
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Ultra Low-Power 9-Transistor Flip-Flop Design
Abstract: AbstractThe use of very large scale integration technology in high performance computing, wireless communication, consumer electronics has been rising at a very fast rate. The challenge for VLSI technology is mainly in leakage power consumption. Flip-Flops (FFs) are the basic storage elements used extensively in digital system designs. It accounts for 20%–45% of the total system power and may considerably impact the chip area. In this paper, an ultra-low-power true …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 3, 2018 · pp. 27–32 Read article
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Review Paper On Lifi Technology
Abstract: Light Fidelity is the abbreviation for Light Fidelity. The concept is relatively new, having been introduced by German scientist Harald Haas at the 2011 TED Global Talk on Visible Light Communication (VLC). Li-Fi is a wireless optical networking system that transmits data using light emitting diodes (LEDs). Visible light communication (VLC) technology is referred to as Li-Fi. 802.15.7. IEEE 802.15.7 is a wireless communication technology based standard that is high-speed, …
Published in Journal of Microelectronics and Solid State Devices · Vol. 8, Issue 2, 2021 · pp. 1–6 Read article
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Effects of Supply Voltage on 6T CNT Based Schmitt Trigger
Abstract: In this growing and developing age of technology, we are needed to improve our methods in order to get better results. So taking this into account, in electronic field, we want circuits with low propagation delay, leakage current and leakage power. So, we compared the model of Schmitt trigger using C-MOS (Complementary mosfet) and CNT (carbon nanotube) technology. We performed the variation in power supply (varied from 0.1to 1.2 V) …
Published in Journal of Power Electronics and Power Systems · Vol. 8, Issue 2, 2018 · pp. 19–24 Read article
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Women’s Land Tenure Security in Sustainable Development
Abstract: Appropriate land ownership policy is critical issue in order for vast majority of population living in rural areas whose income is dependent on agricultural. For that land tenure security is momentous concern. Land tenure is Latin word, tenure, which means to hold. Thus, land tenure means a kind of system of land ownership or holding the land. The rules of the land tenure system define how property rights to land …
Published in Journal of Production Research & Management · Vol. 9, Issue 1, 2019 · pp. 21–30 Read article
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Implementation and Analysis of Full Adder using low Power Adiabatic Techniques
Abstract: AbstractIn this study, authors have discussed, designed and compared the low power adiabatic logic energy efficient recovery logic (ECRL) and positive feedback of adiabatic logic (PFAL) with conventional Complementary Mosfet (CMOS) logic. A one-bit full adder using these design techniques are implemented and results are compared like power, delay, transistor count and power delay product. Tanner tool v13 is used for designing of schematic and simulation. From the result, it …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 2, 2018 · pp. 1–8 Read article
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Design and Implementation of Low Power Area Effective 2×4 Decoder for SARM Applications Using 16 nm Technology.
Abstract: This project involves analysis of Modified Mixed Logic Design abbreviated as MMLD which includes following design logics: Complementary Metal Oxide Semiconductor abbreviated to CMOS logic design, Gate Diffusion Input abbreviated as GDI technique, and Dual Value Logic called as DVL. Two logic styles are used in this paper study to reduce power dissipation and delay time which are fourteen 14-transistor and fifteen 15-transistor decoders. Every situation requires the use of …
Published in Journal of Semiconductor Devices and Circuits · Vol. 10, Issue 1, 2024 · pp. 24–36 Read article
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Monitoring the Effect of Temperature and Time on the Characteristics of Metal Sample Corrosion Rate Inhibition using Selaginella myosurus and Pneumatoptens pennigera (GF) Plants
Abstract: This research showcases the effect of temperature and time on the characteristics of metal in terms of weight loss and corrosion rate using Selaginella myosurus or Pneumatoptens pennigera Plant. The weight loss was monitored at temperature range of >300OC to < 385OC and time period of 20hr to 120hr as well as decrease and increase was experienced. However, the research further demonstrates the decrease in weight loss of the metal …
Published in Journal of Thin Films, Coating Science Technology & Application · Vol. 10, Issue 1, 2023 · pp. 10–19 Read article
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Logic Optimization Algorithm based on Shannon’s Expansion: Reduction in Area, Power and Delay for Pass Gate Implementation
Abstract: The reduction in hardware requirement for any application does not only guarantee the reduction of chip area but also significantly reduces the corresponding power consumption and delays. Hence, any heuristic used to reduce the hardware requirement for given logic is always well justified. In this paper, the number of pass gates required to implement the given Boolean Logic is reduced by sizeable amount with use of the proposed algorithm for …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 2, 2013 · pp. 24–34 Read article
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Power-delay Product Optimal Design of Sequential Circuits Using Carbon Nanotubes
Abstract: This paper presents a power-aware high-performance design of ternary combinational and sequential circuits based on carbon nanotube field effect transistor (CNFET) using ternary logic. Carbon nanotube based field effect transistor (CNFET) are being studied extensively as a possible and promising choice for nanoscale integration and as successor to complementary metal oxide semiconductor (CMOS) devices. Ternary logic circuit has attracted substantial interest due to its simplicity, energy efficiency, and reduced interconnect …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 3, 2013 · pp. 27–36 Read article
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Analysis and Characterization of Different Topologies of Dynamic Latch based CMOS Comparators for Delay, Offset and Power
Abstract: This paper presents the analysis and characterization of various topologies of dynamic latch based complementary metal oxide semiconductor (CMOS) comparator. Various comparator topologies like resistor divider comparator (RDC), differential pair comparator (DPC), double-tail dynamic latched comparator (DTDLC), energy efficient two-stage comparator (ETWC) and two-stage dynamic comparator (TSDL) are analyzed and compared for various performance parameters. Besides zero static power consumption, resistor divider comparator has high offset voltage and it depends …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 2, 2016 · pp. 86–98 Read article
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Implementation of Low Power Shift Registers Using Multi-Threshold CMOS Technique
Abstract: This paper enumerates the design of low power shift registers using dual-edge triggered flip-flop (DETFF). In the conventional shift registers, high leakage current is becoming a significant contributor to power dissipation. In order to overcome this problem, the multi-threshold complementary metal oxide semiconductor (MTCMOS) technology is used for leakage minimization in proposed designs. This technology features both low-threshold and high-threshold voltage MOSFETs. High-threshold voltage MOSFETs reduced the standby leakage current …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 2, 2016 · pp. 53–61 Read article
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Block SLM Scheme for Efficient PAPR Reduction in OFDM Systems
Abstract: AbstractOrthogonal frequency division multiplexing (OFDM) is an attractive technique due to its high-speed data transmission and robustness for time-selective channels. However, the major drawback of OFDM system is high peak-to-average power ratio (PAPR). In this paper, two PAPR reduction schemes have been introduced; one is conventional selected mapping (SLM) scheme and a new proposed block selected mapping (BSLM) scheme to obtain PAPR reduction performance in OFDM system. In the proposed …
Published in Journal of Communication Engineering & Systems · Vol. 3, Issue 3, 2013 · pp. 10–16 Read article
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Emerging Techniques and Trends in DNA Cryptography
Abstract: Abstract: This paper reviews recent research trends and methods in the field of DNA cryptography. An attempt is made to introduce biological background and the literature concerning the various DNA cryptography techniques mainly comes under Pseudo DNA cryptography and DNA steganography based on biomolecular operations. The paper explains some of the key algorithms in designing Pseudo DNA cryptographic scheme such as (i) DNA Insertion, (ii) DNA Substitution and (iii) DNA …
Published in Journal of Computer Technology & Applications · Vol. 10, Issue 3, 2019 · pp. 29–41 Read article
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Hardware and Power Efficient Single Bit Full Adder Using GDI and PTL Technique
Abstract: Abstract: This study presents hardware and power efficient single bit full adder which consists of two techniques, Pass Transistor Logic (PTL) and Gate Diffusion Technique (GDI). Several logic families are described by PTL which is utilized in the architecture of integrated circuits. PTL technique is used to decrease the number of transistors in the circuits to make different logic gates. GDI technique is utilized for the low power consumption. CADENCE …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 7, Issue 3, 2019 · pp. 9–17 Read article