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136 articles for “CMOS Circuit”
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A Novel 4:1 Multiplexer Design using Power Minimization Technique based Domino Logic
Abstract: Domino circuits are widely used these days in the design of modern-day microprocessors because of their high speed and less area overhead compared to static logic style. In this paper, a new domino-based 4:1 multiplexer circuit has been designed which finds extensive use in register files and execution units where large amounts of data have to be broken into smaller chunks so that the processor can manipulate it more easily …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 3, 2013 · pp. 1–7 Read article
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Optimizing the Ratio of Number of Tubes in PCNTFET to NCNTFET for Digital Circuits
Abstract: AbstractCarbon nanotube Field Effect Transistors (CNTFET) offer various benefits as compared to other FETs. Many circuits can be constructed using PCNTFETs (P-type CNTFET) and NCNTFETs (N-type CNTFET) similar to the PMOS and NMOS of the CMOS technology. The CNTFETs employ carbon nanotubes in the channel of the device to provide a path for the ballistic conduction of electrons. The different ratios of number of tubes in channel of the PCNTFET …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 1, 2018 · pp. 34–40 Read article
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GDI Logic Implementation of Variable Sized CSLA Architectures Using 45 nm SOI Technology
Abstract: Carry select adder (CSLA) is an efficient adder used in modern processors. But, the CMOS logic implementation at the transistor level makes it complex. The use of smaller transistor size has shrunk the overall design but the transistor count was retained. Hence, in this paper the transistor level implementation of variable sized CSLA architecture is done using gate diffusion input (GDI) logic. This implementation drastically simplifies the CSLA in terms …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 1, 2016 · pp. 78–88 Read article
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Development of Polymer Based SRAM Cell with Enhance Low Power Performance
Abstract: Low-power memory technologies are in high demand with the rapid growth of portable electronics and energy-efficient computing systems. Static random-access memory (SRAM) plays a crucial role in processors, cache memories, and system-on-chip applications due to their speed and reliability. Static Random Access Memory (SRAM) is typically implemented using complementary MOS (CMOS) technology, which integrates both PMOS (P-channel Metal–Oxide–Semiconductor) and NMOS (N-channel Metal–Oxide–Semiconductor) transistors. However, as technology scales to deep submicron …
Published in Journal of Polymer & Composites · Vol. 14, Issue 1, 2026 · pp. 1439–1448 Read article
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3D Simulation of Multi-Gate Mosfet Analysis for Analog Circuit Design Parameters
Abstract: Chip density and performance improvements of semiconductor devices have been driven by their aggressive scaling. The performance of multi-gate FET for analog applications is explored in this paper. Analog operation of CMOS devices and its parameters are very important for future cutting edge technologies. The multi-gate technology shows excellent scalability and better immunity to short channel effects in MOSFETs. They are being easily assessed for CMOS applications beyond the 45 …
Published in Journal of Semiconductor Devices and Circuits · Vol. 1, Issue 2, 2014 · pp. 1–8 Read article
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An Optimized 32 bit Carry Select Adder Using Modified BEC
Abstract: AbstractAdders play a major role in addition of numbers, multiplications and other advanced processors’ design. Among the conventional adder structures, carry select adder is known to be fastest adder. This adder circuit is used for the design of high speed processors. The CSLA adder architecture is such that it is of less power dissipation, area efficient and high speed. CSLA circuit for 8, 16, 32 bits is designed without multiplexer …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 2, 2018 · pp. 27–32 Read article
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An Overview on MOSFET based Sensor Design
Abstract: In the past two decades the MOSFET has transformed from a simple switch in digital logic to an analog powerhouse that can be cofabricated with the sensing material on a single chip. MetalOxideSemiconductor FieldEffect Transistors (MOSFETs) have silently become the beating heart of modern sensor platforms, translating the faint whispers of physical, chemical, and biological phenomena into robust electrical signatures. This abstract surveys the latest advances that have turned the …
Published in Journal of Microelectronics and Solid State Devices · Vol. 13, Issue 1, 2026 · pp. 20–26 Read article
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Performance Analysis of 3T DRAM Using FinFET Based with Leakage Reduction Techniques at 45 nm Technology
Abstract: The proposed area of research is to reduce the power consumption, leakage voltage, leakage current and leakage power of DRAM while maintaining the competitive performance. The Fin FET approach is used in DRAM for high performance. Fin type field effect transistors (Fin FET) are capable substitutes for bulk CMOS at the nano-scale. Fin FET are double gate device. A Fin FET uses an intrinsic body. It greatly suppresses the device-performance …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 28–34 Read article
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Performance Analysis of 3T DRAM Using FinFET Based with Leakage Reduction Techniques at 45 nm Technology
Abstract: The proposed area of research is to reduce the power consumption, leakage voltage, leakage current and leakage power of DRAM while maintaining the competitive performance. The Fin FET approach is used in DRAM for high performance. Fin type field effect transistors (Fin FET) are capable substitutes for bulk CMOS at the nano-scale. Fin FET are double gate device. A Fin FET uses an intrinsic body. It greatly suppresses the device-performance …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 2, 2017 · pp. 28–34 Read article
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Physics of Semiconductors and Electronic Circuits
Abstract: This study talks about the basic ideas behind semiconductor physics and how important they are for making and running modern electronic circuits. It starts with a look at intrinsic and extrinsic semiconductors, going into how charge carriers move, energy band theory, and how doping affects how well the electricity flows. Next, the conversation turns to semiconductor devices like diodes, bipolar junction transistors (BJTs), and field-effect transistors (FETs). The focus is …
Published in Journal of Semiconductor Devices and Circuits · Vol. 12, Issue 2, 2025 · pp. 9–17 Read article
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Design of Voltage Controlled Oscillator using GDPK 90nm CMOS Technology
Abstract: In the recent decade, there has been a major revolution in communication systems and devices. Many communication devices required a specific frequency which may range from a few Hz to several GHz by source of voltage. Voltage Control Oscillator (VCO) plays a major role in today’s modern communication system. Voltage Control Oscillator use as basic building block in communication circuits and major use in phase locked loops circuits. Due to …
Published in Journal of Electronic Design Technology · Vol. 13, Issue 1, 2022 · pp. 17–24 Read article
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Design and Implementation of 2nd Order Gm-C IF Tuning Filter Operating at 900 MHz and 88–108 MHz Wireless System for Multi Standard Receiver
Abstract: This paper deals with design and optimization of folded cascode OTA-C filter, which works for frequencies that lead to a base band circuit design for RF application, is based on transistor sizing methodology and Simulation results are performed using SPICE software and BSIM3V3 model for CMOS 0.18 μm process, show that the designed folded cascode OTA has a 52 dB DC gain and provides a Unit gain bandwidth of around …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 1, 2014 · pp. 8–24 Read article
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Design of Active Filter using CMOS based IInd Generation Current Conveyor in Current Mode
Abstract: Traditional design techniques used in VLSI are in voltage mode, but these have drawbacks like low bandwidth, non-linearity and less gain. Current conveyors act similar to operational amplifiers but are advantageous over older VLSI design techniques because of high bandwidth-gain product, reduced power consumption etc. This paper consists of two parts: circuit diagram of current conveyor (which is a three terminal analog device) is discussed first and its working is …
Published in Journal of VLSI Design Tools and Technology · Vol. 9, Issue 1, 2019 · pp. 15–21 Read article
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Hardware and Power Efficient Single Bit Full Adder Using GDI and PTL Technique
Abstract: Abstract: This study presents hardware and power efficient single bit full adder which consists of two techniques, Pass Transistor Logic (PTL) and Gate Diffusion Technique (GDI). Several logic families are described by PTL which is utilized in the architecture of integrated circuits. PTL technique is used to decrease the number of transistors in the circuits to make different logic gates. GDI technique is utilized for the low power consumption. CADENCE …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 7, Issue 3, 2019 · pp. 9–17 Read article
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Design and Performance Analysis of Full Adder Cell using FinFET Technique at 32nm Technology
Abstract: AbstractIn this paper, discussed is the comparative analysis of complementary MOS (CMOS) and dual gate-FinFET (fin shaped field effect transistor) based full adder cell design. To reduce the average power, average current and maximum current of 1-bit full adder circuit a new high DG-FinFET technique is presented. Use of double-gate FinFET technology provides low leakage and high performance operation. For MOSFET transistor model, a predictive technology model (PTM) BSIM4 and …
Published in Journal of Microelectronics and Solid State Devices · Vol. 4, Issue 3, 2017 · pp. 1–8 Read article
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Modelling and Electrical Characterization of Single Electron Transistor
Abstract: A nano-electronic device with low power consumption, high performance, and quantum effects is the single electron transistor (SET). It's used in charge sensor applications, infrared radiation detectors, and spectroscopy. However, it faces limitations in lithography, co-tunneling effect, low gain, high output impedance, and background charges. Therefore, prior simulation is needed to optimize SET's work function and understanding physics concepts. A master equation approach is used to propose a new model …
Published in Journal of Semiconductor Devices and Circuits · Vol. 10, Issue 3, 2024 · pp. 19–25 Read article
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Ternary Logic Design Approach - From CMOS to CNTFET
Abstract: The goal of this review is to offer a broad study on the ternary logic designs based on CMOS (complementary metal-oxide-semiconductor) and CNTFET (carbon nanotube field effect transistor) suitable for energy efficient and high-performance VLSI design. Performance investigation of the ternary logic-based designs will be the primary emphasis as the ternary logic is a good substitute for the conventional binary logic among all the multiple-valued logics because it permits simple …
Published in Journal of Nanoscience, NanoEngineering & Applications · Vol. 8, Issue 2, 2018 · pp. 20–30 Read article
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Design of 6-Bit Two-step Flash ADC for High Speed and Low Power Applications
Abstract: In this paper, 6-bit two-step Flash ADC operated at the 2 GS/s is designed, with optimized performance for frequency domain applications. To get the best performance, the coarse convertor of 2-bit and the fine convertor of 4-bit are chosen. The comparator design is done with optimum power and area with two power supplies. Intermediate state accuracy increased by thermometer coded current steering DAC. The DNL and INL specifications are chosen …
Published in Journal of Electronic Design Technology · Vol. 3, Issue 1-3, 2012 · pp. 29–39 Read article
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A Novel Logic Styles used for Leakage Power Reduction in MOS Integrated Circuit
Abstract: Modified constant delay logic style and clocked logic style is defined by comparing their result. In this paper, a design technique has been proposed which reduces the power dissipation. The design and implementation of full adder and ripple carry adder with constant delay logic. The leakage power has become a serious concern in CMOS technologies that has been solved by the MCD and clocked logic style. Constant delay logic style …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 1, 2016 · pp. 1–5 Read article
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A Double-Ended Read-Decoupled 8T SRAM Cell with Improved Read Stability and Access Time at 45 nm Technology
Abstract: AbstractDue to rampant leveling of instrument measurements, the stability of an SRAM cell is the biggest anxiety for upcoming technology. In this paper, it is introduced by an 8T (8-transistor) SRAM cell. The enlarged data stability is offered by proposed cell until read operation. The voltage scale of the node keeping ‘0’ is enlarged by introduced cell and thus it achieves a near butterfly curve that is vital to creation …
Published in Journal of Semiconductor Devices and Circuits · Vol. 4, Issue 2, 2017 · pp. 29–33 Read article