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1206 articles for “Fasting”
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Automated Access Backdoor for UVM_REG Layer
Abstract: Systems on chips (SoCs) design have many configuration registers. Configuring the registers through a Bus protocol consumes lot of simulation time. Hence, time saving becomes a challenge in configuring the registers. The other way to configure registers is backdoor access. Backdoor is a zero simulation time access by mapping to the register directly using the hierarchical path. It allows rapid configuration of registers and can uncover hidden bugs as execution …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 2, 2015 · pp. 49–53 Read article
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Low Power 8-Bit Square Root Carry Select Adder Constructed By Using 8 Transistor Full Adder
Abstract: Carry select adder is the high speed adder which is designed to speed up arithmetic operations and to reduce the computation time. Carry select adder is used to perform fast arithmetic functions in data processing processors. Low power consumption, reduced area, reduced delay and increased speed are the most important features of the modern electronic system design. In this proposed work, 8 transistor full adder (8T full adder) is used …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 1, 2014 · pp. 25–29 Read article
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An FPGA-based Controller Design for Servo Actuator Using Xilinx System Generator and HDL Cosimulator
Abstract: This paper aims at designing a Field programmable gate array (FPGA)-based proportional, integral derivative (PID) controller in a servo-actuated control system. In the conventional method of implementing control systems in FPGA, there is no interaction between the controller and the system except for the final stage of implementing control system in the hardware. The proposed methods provide approaches for analyzing the performance of the controller and system in MATLAB simulink …
Published in Journal of VLSI Design Tools and Technology · Vol. 2, Issue 1-2-3, 2012 · pp. 1–6 Read article
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Design of Single Bitline Novel 5T SRAM Cell to Reduce The Power Dissipation Using Cadence
Abstract: Fast growing field of IC technology is persistently demanding for low power consumption and efficient solution. Most of the available SRAM designs are based on standard 6T SRAM cell in addition to other circuit and transistors count. A novel 5T CMOS SRAM is presented in this paper, for simultaneously minimizing power consumption and an improving process speed. The presented unique 5T SRAM cell employs single bitline for read/write function. Implementation …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 1, 2016 · pp. 49–54 Read article
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Design of Booth Encoded Multi-Modulus {2n-1, 2n, 2n+1} RNS Multiplier
Abstract: Multiplication, a very important arithmetic operation, is finding a great use these days in various applications (especially DSP, multimedia and image processing). Due to advances in technology and increasing needs for high-speed calculations, it has become really necessary and important to design a fast efficient multiplier. A productive method to speed up the multiplication is reduction in the Partial Product (PP) array. In this paper, the design of 8, 16 …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 3, 2016 · pp. 7–14 Read article
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Implementation of Carry Select Adder with Reduced Area Scheme
Abstract: Addition is the heart of arithmetic unit and the arithmetic unit is often the work horse of a computational circuit. So, adders play a key role in designing an arithmetic unit and also many digital integrated circuits. Carry select adder (CSLA) is one of the fastest adders used in many data processors and in digital circuits to perform arithmetic operations. But CSLA is area-consuming because it consists of dual ripple …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 1, 2017 · pp. 1–5 Read article
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Low-Power Design of Content Addressable Memory using Master Slave Match Line Architecture
Abstract: Content Addressable Memory (CAM) is a storage unit used for faster accessing of lookup table that reduces processing time for search operation. It is mainly used very-high-speed searching applications like computer networking devices. The MAC address table is implemented with a CAM so that the destination port can be easily detected by reducing the switch’s latency. CAM gets its high speed of operation by parallel search mechanism. This paper proposes …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 1, 2017 · pp. 29–34 Read article
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Hardware Implementation of Discrete /Inverse Discrete Cosine Transform Using Redundant Number System CORDIC Processors
Abstract: Rapid enhancement in multimedia service running on portable application has forced the development of high quality and low power implementation of complex signal processing algorithms. Image and video processing are typical application of multimedia system. Image compression and decompression using DCT/IDCT are the two algorithms commonly used in MPEG standard of image processing. For an image of N x N size, DCT/IDCT would require N4 multiplications and increases complexity. To …
Published in Journal of VLSI Design Tools and Technology · Vol. 11, Issue 1, 2021 · pp. 35–42 Read article
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Comparative Analysis of Partial Product Addition in Vedic Urdhva Tiryakbhyam Multiplier
Abstract: Multiplication is one of important operations performed in many digital signal processing applications. Hence the performance of the multiplier will affect the overall performance of the DSP processor. The methods like booth multiplier, and array multiplier are used. Vedic multiplication technique had proved its importance in getting the speed of multiplication. It is required to add the generated partial products quickly, to generate the result of multiplication faster. To add …
Published in Journal of VLSI Design Tools and Technology · Vol. 13, Issue 1, 2023 · pp. 15–32 Read article
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Study And Literature Analysis of The Coarse-Grained Logic Interface with Floating-Point Arithmetic Unit
Abstract: Field-Programmable Gate Arrays (FPGAs) have become an essential digital circuit implementation techni que. The research looks at the design parameters by evaluating the building of an arithmetic logic unit (ALU) in Xilinx Vivado utilizing Hardware Description Language (HDL) and implementing common Field Programmable gate arrays (FPGAs). The ALU is a logic design component in digital computers that seeks to deliver optimal algorithms to maximize the usage of available hardware. The …
Published in Journal of VLSI Design Tools and Technology · Vol. 13, Issue 2, 2023 · pp. 45–55 Read article
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Delta Sigma Fractional N Frequency Synthesis
Abstract: Frequency synthesizers are fast becoming essential for several broadcast bands and circuits as communication technology hasimproved. To meet this need, the fractional N frequency synthesizer was created. This synthesizer has proven its supremacy as a noteworthyinnovation by permitting various improvements over comparable concepts. Only when it is combined with delta-sigma modulation is thispossible. This combi- national circuit enhances frequency resolution and noise performance. PLL-based frequency synthesis is often used toproduce …
Published in Journal of VLSI Design Tools and Technology · Vol. 13, Issue 2, 2023 · pp. 12–20 Read article
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Design and Implementation of Carry Select Adder based On Wallace tree Multiplier using Adiabatic Logic
Abstract: The Wallace tree multiplier construction using a carry select adder (CSA) and this paper discusses adiabaticlogic. The proposed design aims to reduce power consumption while maintaining high performance.Adiabatic logic is employed to reduce power dissipation by recycling energy during the logic transitions. TheWallace tree multiplier is used to perform fast multiplication of two large numbers by breaking down themultiplication process into smaller sub-tasks. The CSA is used as the adder …
Published in Journal of VLSI Design Tools and Technology · Vol. 13, Issue 2, 2023 · pp. 21–31 Read article
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Modernization in Urban Water Distribution System: A Review
Abstract: The physical infrastructure always plays an important role in the urban area. In the water distribution system, usually the water supplied from the various reservoirs to the consumers. The outline of the pipeline will track the road network of the concerned area. Due to rapid urbanization, in an urban area, the demand of water is increasing day by day. Due to this, the pressure on the existing network is growing. …
Published in Journal of Water Resource Engineering and Management · Vol. 5, Issue 2, 2018 · pp. 45–50 Read article
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Flood Resilient Land Use Planning for Gurugram
Abstract: Floods have become a common phenomenon in the fast urbanizing world as a consequence of accumulation of large amount of water in a particular area, either as a result of direct rainfall exceeding the capacity of drainage systems or a spill of enormous amounts of water from water bodies. Urbanization develops densely populous urban areas where the inhabitants suffer as a result of floods due to the reasons mentioned above, …
Published in Journal of Water Resource Engineering and Management · Vol. 9, Issue 3, 2022 · pp. 1–9 Read article
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A Study on Earthquake Resistance Building Construction
Abstract: Earthquake is one of the largest and greatest dangerous hazards of the property and life in the world. Due to its quick and sudden reaction, the buildings, highways, bridges, tunnels etc., are damaged very fast and also causes so many fatal and nonfatal injuries of people. For the safety purpose, many precautions during the design and construction time were considered in the structures. In this paper, we have done a …
Published in Recent Trends in Civil Engineering & Technology · Vol. 6, Issue 3, 2016 · pp. 1–5 Read article
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Combined Effect of Ceramic Waste and Metal Fiber Waste on Splitting Tensile and Flexural Strength in Pavement Concrete
Abstract: India is a prodigious country, with a huge population almost second in the world, will increase from China by the middle of this century. In India, majority of the population is much younger, which have advantage of having substantial work force and epic development opportunities. India’s 12th Five Year Plan is pivoted on the growth of infrastructure facilities such as roads and highways, railways, ports and shipping, power stations, irrigation …
Published in Recent Trends in Civil Engineering & Technology · Vol. 6, Issue 3, 2016 · pp. 32–39 Read article
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Slope Stability Analysis by Swedish Slip Circle Method Using C-Programming
Abstract: The side slopes of an earthen dam should be safe against shear failure. Out of the various methods of stabilityanalysis of slopes, “Swedish Slip Circle Method” is commonly used in practice. Here in the Swedish circlemethod, potential failure surface is assumed to be cylindrical in shape (i.e., circular in cross section). Afterdetermining the actuating and resisting forces for assumed failure surface, the factor of safety is calculated. Theslope is considered …
Published in Recent Trends in Civil Engineering & Technology · Vol. 1, Issue 1-3, 2011 · pp. 47–68 Read article
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Decision Making in Rural Infrastructure Development
Abstract: Infrastructures are the basic system, services and facilities that countries or organizations need to improve the quality of life. Urban infrastructures in India are developing faster as compared to the rural infrastructure. Rural infrastructure need to be placed in order to achieve the basic needs required for living. In order to achieve the basic needs in the rural sector, First step is the evaluation of the existing infrastructure and this …
Published in Recent Trends in Civil Engineering & Technology · Vol. 11, Issue 3, 2021 · pp. 10–15 Read article
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A Study On Mems Piezoresistive Pressure Sensor Design And Its Applications
Abstract: Easier and faster means of Pressure measurement is in utmost demand in Industries. MEMS piezoelectric pressure sensors can meet the claim due to its compactness and lightweight. The pressure measurement is purely application specific. The number of steps required to fabricate the MEMs sensor can be condensed if a proper selection of sensor is done. Based on the type of the piezoelectric materials used in the design, the shape of …
Published in Recent Trends in Electronics Communication Systems · Vol. 8, Issue 1, 2021 · pp. 18–23 Read article
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MACHINE VISION BASED COIN SEPARATOR AND COUNTER
Abstract: AbstractAutomation holds a vital role in nearly all walks of the human life. Separation and counting of Indian currency coins is considered in this project. Nearly all the temples in India have donation boxes (Hundi). More human intervention is required to separate such coins and hence it could be automated and as a result it improves efficiency and reduces the time consumption in the process. This project adapts automation for …
Published in Recent Trends in Sensor Research & Technology · Vol. 5, Issue 1, 2018 · pp. 24–30 Read article