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168 articles for “reduced delay”
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Evaluating Delay Impacts: From Root Cause Analysis to Dispute Resolution
Abstract: Construction projects inherently involve complex coordination among multiple stakeholders, interdependent tasks, and unpredictable external challenges, which frequently cause schedule overruns and disputes. Traditional contractual mechanisms—such as extensions of time (EoT), liquidated damages, and force majeure clauses—serve to define responsibilities, allocate risk, and establish formal dispute pathways when delays arise. For example, EoT provisions protect contractors from penalties when delays are beyond their control, provided proper notice and evidence are submitted …
Published in Journal of Structural Engineering and Management · Vol. 12, Issue 3, 2025 · pp. 11–25 Read article
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Implementation of FIR Filter with Reverse Converter based RNS Kogge–Stone Adder
Abstract: AbstractLow power very large scale integration (VLSI) circuits are pertinent for designing of steep overall performance and adjustable devices. In current technology VLSI plays a vital role to reduce power consumption and delay. In analog to digital converter process, adder plays a crucial role. The authority of nonviolent issue is increasing regularly because of changing that a way, packaging and cooling cost, transportable route of motion and reliability. This freebie …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 2, 2018 · pp. 34–43 Read article
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Design and Simulation of Low-power, High-speed Effective Area Mux Based One-bit Full Adder Using CMOS Technology
Abstract: Our findings reveal a novel kind of circuit capable of performing both XOR and XNOR operations in parallel. Power dissipation and delay are both greatly reduced in the proposed circuits due to their low output capacitance as well as minimal short-circuit power dissipation. We show six new hybrid 1-bit full-adder (FA) circuits that take use of the XOR-XNOR or XOR/XNOR gates' special full-swing function. Each potential circuit layout has both …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 1, 2023 · pp. 25–33 Read article
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Hardware Implementation of Discrete /Inverse Discrete Cosine Transform Using Redundant Number System CORDIC Processors
Abstract: Rapid enhancement in multimedia service running on portable application has forced the development of high quality and low power implementation of complex signal processing algorithms. Image and video processing are typical application of multimedia system. Image compression and decompression using DCT/IDCT are the two algorithms commonly used in MPEG standard of image processing. For an image of N x N size, DCT/IDCT would require N4 multiplications and increases complexity. To …
Published in Journal of VLSI Design Tools and Technology · Vol. 11, Issue 1, 2021 · pp. 35–42 Read article
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Machine Learning Approach to Detect and Analyze Attention-Deficit/Hyperactivity Disorder
Abstract: Attention-Deficit/Hyperactivity Disorder (ADHD) is a neurodevelopmental disorder characterized by difficulties with attention, impulse control, behavioral regulation, and daily functioning that persist across childhood and adulthood. Clinical diagnosis is predominantly based on behavioral assessments and expert interpretation, which may result in subjectivity and delayed clinical decisions. To reduce reliance on subjective evaluation, this study introduces an automated ADHD identification framework that integrates resting-state functional Magnetic Resonance Imaging (rs-fMRI) with advanced machine …
Published in Research and Reviews: A Journal of Neuroscience · Vol. 16, Issue 2, 2026 · pp. 22–26 Read article
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An Efficient Counter Using Modified Upper and Lower SVL Techniques and TSPCL
Abstract: Low power VLSI has emerged as the fundamental building block of the modern electronic era. This leads to a substantial paradigm shift where both power dissipation, performance and area of utmost importance. In the earlier time of fabrication, power dissipation was mainly neglected due to low device density and low operating frequency needed for computation. But in modern technological era, the need for high device density, higher operating frequency, proliferation …
Published in Research & Reviews : Journal of Physics · Vol. 13, Issue 2, 2024 · pp. 37–43 Read article
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An Area Delay Optimized Carry-Select Adder
Abstract: In arithmetic and logic unit of digital signal processor (DSP), adder is the important hardware unit. Carry select adder (CSLA) is the best example of the adder used in DSP and it is widely used in many data processors to increase speed. So, the adder performance affects the overall system-performance. The Regular Square root (SQRT) CSLA consists of two Ripple Carry Adders (RCA), so it consumes more area due to …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 3, 2018 · pp. 10–14 Read article
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Functioning of Janani Suraksha Yojna: Constraint of Multipurpose Health Worker Females
Abstract: Government launched Janani Suraksha Yojana (JSY) is a safe motherhood intervention to reduce maternal mortality and infant mortality rate through better provision and utilization of services. We carried a study in four sub-centres, selected purposively, from two rural blocks of Haryana, a province of north India to review functioning of JSY and to access the problems faced by MPHW females in implementation of JSY. All the beneficiaries who received the …
Published in Journal of Nursing Science & Practice · Vol. 1, Issue 1-2, 2011 · pp. 38–43 Read article
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Low Power Area Efficient 4×4 Vedic Multiplier using GDI half adders with Better Delay Performance
Abstract: In the field of VLSI, wireless communication and digital signal processing, low power and area efficient architectures are considered. Majority of such applications uses multiplication. The multiplication is done using repetitive addition and shift and add method. It consumes more area delay and power. Vedic multiplier is one of the efficient multiplier. It is designed using different Vedic techniques or sutras, which reduces the area, power consumption and provide better …
Published in Journal of Control & Instrumentation · Vol. 10, Issue 2, 2019 · pp. 28–39 Read article
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Energy-Aware Task Offloading in 6G-Enabled Mobile Edge Computing Environments
Abstract: The emergence of sixth-generation (6G) wireless communication networks is expected to revolutionize future mobile systems by enabling ultra-low latency communication, extremely high data rates, massive connectivity, and intelligent network management. In parallel, mobile edge computing (MEC) has gained significant attention as a promising paradigm that brings computational resources closer to end users, thereby alleviating network congestion and reducing end-to-end service delays. Despite these advantages, the rapid growth of computation-intensive and …
Published in International Journal of Mobile Computing Technology · Vol. 4, Issue 1, 2026 · pp. 14–19 Read article
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ICU Health Monitoring System in IoT with Machine Learning
Abstract: The Internet of Things (IoT) allows humans to push to a higher level of automation by developing systems using various sensors, interconnected smart devices, and the Internet. In ICU, patient checking is basic and most vital activity as little deferral in choice related to patients’ treatment may cause lasting permanent disability or maybe death. Most ICU devices are equipped with various sensors to live health parameters but to watch it …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 9, Issue 1, 2021 · pp. 25–34 Read article
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A Comparative Study to Assess the Effectiveness of Bitter Gourd Juice Vs Bottle Gourd Juice on Blood Sugar Level and Urine Sugar Level in Diabetes mellitus Patients in Selected Area of Nasrapur
Abstract: Worldwide number of diabetic patients is increasing. In India it is increased from 4 million in 1984 to 30 million in 1999. Indian population increased from 680 million to 1 billion in past 16 years; whereas diabetic patients increased more than seven fold. Every fifth diabetic in the world will be an Indian. It is estimated that by the end of 2025, India will be leading in diabetic patients. It …
Published in Journal of Nursing Science & Practice · Vol. 5, Issue 1, 2015 · pp. 18–20 Read article
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IoT-Driven Accident Alert and Rescue Management System for Smart Mobility
Abstract: An IoT-enabled vehicle accident detection and rescue system is a modern approach aimed at improving road safety by identifying collisions as they occur and facilitating quick emergency assistance. Traffic accidents remain a major cause of death across the globe, and the lack of timely medical help frequently intensifies the severity of injuries. This system leverages the power of the Internet of Things (IoT) to monitor a vehicle's dynamics and detect …
Published in Journal of Communication Engineering & Systems · Vol. 16, Issue 1, 2026 · pp. 01–05 Read article
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Comparative Analysis of Partial Product Addition in Vedic Urdhva Tiryakbhyam Multiplier
Abstract: Multiplication is one of important operations performed in many digital signal processing applications. Hence the performance of the multiplier will affect the overall performance of the DSP processor. The methods like booth multiplier, and array multiplier are used. Vedic multiplication technique had proved its importance in getting the speed of multiplication. It is required to add the generated partial products quickly, to generate the result of multiplication faster. To add …
Published in Journal of VLSI Design Tools and Technology · Vol. 13, Issue 1, 2023 · pp. 15–32 Read article
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Design and Validation of Low Power High Speed area effective comparator using CMOS Technology
Abstract: The most fundamental arithmetic comparisons in a digital comparator involve comparing two numbers that are greater than, less than, or equal to each other. While doing enormous level arithmetic comparisons, a digital comparator needs more space, which results in higher power consumption and a delayed response. This can be solved by using N-bit comparator with two modules using 45GPDK CMOS Technology. An N-bit comparator can operate at extremely high speeds …
Published in Recent Trends in Electronics Communication Systems · Vol. 10, Issue 2, 2023 · pp. 20–29 Read article
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Power-delay Product Optimal Design of Sequential Circuits Using Carbon Nanotubes
Abstract: This paper presents a power-aware high-performance design of ternary combinational and sequential circuits based on carbon nanotube field effect transistor (CNFET) using ternary logic. Carbon nanotube based field effect transistor (CNFET) are being studied extensively as a possible and promising choice for nanoscale integration and as successor to complementary metal oxide semiconductor (CMOS) devices. Ternary logic circuit has attracted substantial interest due to its simplicity, energy efficiency, and reduced interconnect …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 3, 2013 Read article
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A Survey on Recent Approaches for Leakage Power Reduction in MOS Integrated Circuits
Abstract: Today the integrated circuit’s functionalities are increasing day by day with increase in the number of transistors in it. However, the scaling of the transistors, top increase its number, for the same area of an IC reduces its sub-threshold voltage with its increase in the leakage power consumption. Scaling at different scales (45, 60, 90 nm, etc.) leads to major losses, both at static and dynamic phases of the circuits. …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 2, 2014 · pp. 24–31 Read article
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Spintronic Logic Circuits for Ultrafast Processing
Abstract: Spintronic logic has emerged as one of the most promising post-CMOS paradigms capable of addressing the speed, density, and energy challenges of deeply scaled silicon technologies. By relying on the intrinsic properties of electron spin and magnetization dynamics, spintronic devices—particularly Magnetic Tunnel Junctions (MTJs), Spin-Transfer Torque (STT), and Spin–Orbit Torque (SOT) structures—enable ultrafast, non-volatile data processing with significantly reduced energy consumption. Despite remarkable device-level advancements, circuit- level realization of high-speed, …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 3, Issue 2, 2025 · pp. 35–43 Read article
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Tracking Subsystem in Satellite
Abstract: The central nervous system and operating system of all satellite and spacecraft missions is called Satellite Telemetry, Tracking and Control (STT&C). Ground controllers can keep an eye on and manage the spacecraft's position, velocity, and location thanks to the tracking subsystem of the satellite. A key component of satellite TV for PC operations is tracking, which makes sure that satellites maintain their precise orbits and the right attitude to complete …
Published in International Journal of Satellite Remote Sensing · Vol. 1, Issue 1, 2023 · pp. 36–42 Read article
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Utilizing Artificial Intelligence and Remote Sensing to Predict Flooding in Real-Time and Address Climate Resilience Policy in South Asia
Abstract: South Asia, a region characterized by hydro-climatic instability, faces an intensifying risk from devastating flooding, aggravated by human-induced climate change and intricate river basin interactions. Traditional flood prediction systems, based on limited in-situ data and resource-intensive physical models, have serious delays and resolution problems that make it harder to reduce disaster risk. The combined applications of Artificial Intelligence (AI) and high-resolution remote sensing (RS) constitute a paradigm shift in real-time …
Published in Journal of Remote Sensing & GIS · Vol. 17, Issue 1, 2026 · pp. 45–61 Read article