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55 articles for “CMOS logic”
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1-Bit Full Adder's Analysis and Comparison
Abstract: The full adder circuit forms the basis of majority of digital circuits. Improvement in a basic full adder circuit in terms of area, power and delay affect the performance of whole system. It becomes compulsory to investigate and analyze the performance of implementation of full adder circuit in literature, till now. In this paper, a study is carried out to look into performance parameters of full adder circuit using different …
Published in Journal of Electronic Design Technology · Vol. 6, Issue 2, 2015 · pp. 1–6 Read article
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Comparative Analysis of CMOS CNFET and Memristor Based Full Adder Circuits and CMOS Memristor Based Multiplexer Circuits
Abstract: Continued developments in microelectronics technology have led to a myriad of new compute- intensive applications at the micro-edge, such as artificial intelligence and signal and image processing. Multiplication is a crucial arithmetic process in such applications. However, large logic complexities typically seen in traditional multipliers generate combinatorial blocks with long chains of cascaded carry addition. As such, energy efficiency has remained a primary design challenge for these applications, when powered …
Published in Journal of VLSI Design Tools and Technology Read article
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Comparative Analysis of CMOS CNFET and Memristor Based Full Adder Circuits and CMOS Memristor Based Multiplexer Circuits
Abstract: Continued developments in microelectronics technology have led to a myriad of new compute-intensive applications at the micro-edge, such as artificial intelligence and signal and image processing. Multiplication is a crucial arithmetic process in such applications. However, large logic complexities typically seen in traditional multipliers generate combinatorial blocks with long chains of cascaded carry addition. As such, energy efficiency has remained a primary design challenge for these applications, when powered by …
Published in Journal of VLSI Design Tools and Technology · Vol. 12, Issue 2, 2022 · pp. 22–33 Read article
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A Study on Polymer-Based FinFET Applications and Logic Circuit Implementation with FinFET
Abstract: Nano devices play a crucial role in the semiconductor industry and can work as the solution for the problems like scaling of MOSFET. The FinFET can serve as the substitute of bulk CMOS in nanoscale. It mainly consists of two gate terminals which can be either shorted or kept independent.The shorted gate (SG-FinFET) configuration provides higher Ion and Ioff whereas the Independent Gate (IG-FinFET) configuration reduces the transistor count and …
Published in Journal of Polymer & Composites · Vol. 13, Issue 1, 2025 · pp. 312–340 Read article
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Performance Analysis of Complimentary Pass Transistor Logic Based Multiplexer Using Dual-gate FinFET Technology
Abstract: AbstractThis paper presents the design and analysis of double gate FinFET complimentary pass transistor logic (CPL) multiplexer. The circuit of multiplexer (MUX) using CPL is used for comparison of performance parameters like average power consumption, rise/fall time, delay, slew rate, PDP and EDP. Multiplexer is a digital circuit, it has inputs and select line; select lines are used for select input lines to transfer data to the output end. The …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 1, 2018 · pp. 41–48 Read article
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Design of Decoder Using Domino Logic Circuit for VLSI
Abstract: Dissipation of power from a circuit is the major issue in the design of any VLSI circuit, which decreases the life span of a device/system. NMOS and PMOS circuits are very slow while switching the state from low to high. The speed of the circuit can be increased by decreasing resistance. This process in turn increases the static power dissipation. So, because of these disadvantages, CMOS circuits are used in …
Published in Journal of VLSI Design Tools and Technology Read article
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Design of Decoder Using Domino Logic Circuit for VLSI
Abstract: Dissipation of power from a circuit is the major issue in the design of any VLSI circuit, which decreases the life span of a device/system. NMOS and PMOS circuits are very slow while switching the state from low to high. The speed of the circuit can be increased by decreasing resistance. This process in turn increases the static power dissipation. So, because of these disadvantages, CMOS circuits are used in …
Published in Journal of VLSI Design Tools and Technology · Vol. 11, Issue 3, 2021 · pp. 42–54 Read article
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Design and Implementation of Carry Select Adder based On Wallace tree Multiplier using Adiabatic Logic
Abstract: The Wallace tree multiplier construction using a carry select adder (CSA) and this paper discusses adiabaticlogic. The proposed design aims to reduce power consumption while maintaining high performance.Adiabatic logic is employed to reduce power dissipation by recycling energy during the logic transitions. TheWallace tree multiplier is used to perform fast multiplication of two large numbers by breaking down themultiplication process into smaller sub-tasks. The CSA is used as the adder …
Published in Journal of VLSI Design Tools and Technology · Vol. 13, Issue 2, 2023 · pp. 21–31 Read article
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A Novel 4:1 Multiplexer Design using Power Minimization Technique based Domino Logic
Abstract: Domino circuits are widely used these days in the design of modern-day microprocessors because of their high speed and less area overhead compared to static logic style. In this paper, a new domino-based 4:1 multiplexer circuit has been designed which finds extensive use in register files and execution units where large amounts of data have to be broken into smaller chunks so that the processor can manipulate it more easily …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 3, 2013 Read article
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Improvement of Design Issues in FinFET based Design Techniques for XOR and XNOR Circuits at 45 nm Technology
Abstract: The scaling of conventional CMOS circuit inclines to the short channel effect due to leakage current increase in the circuit. To minimize the short channel effect, FINFET can be used in place of conventional CMOS circuits. This paper demonstrates comparative performance study of high speed, low power and low voltage on XOR and XNOR digital circuit. This paper assesses and compares the performance of XOR and XNOR logic circuits. This …
Published in Journal of Electronic Design Technology · Vol. 5, Issue 1, 2014 · pp. 22–35 Read article
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Design and Validation of Low Power High Speed area effective comparator using CMOS Technology
Abstract: The most fundamental arithmetic comparisons in a digital comparator involve comparing two numbers that are greater than, less than, or equal to each other. While doing enormous level arithmetic comparisons, a digital comparator needs more space, which results in higher power consumption and a delayed response. This can be solved by using N-bit comparator with two modules using 45GPDK CMOS Technology. An N-bit comparator can operate at extremely high speeds …
Published in Recent Trends in Electronics Communication Systems · Vol. 10, Issue 2, 2023 · pp. 20–29 Read article
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Thin-Film Quantum Photonic Technologies for Quantum Teleportation
Abstract: One of the most important protocols in distributed quantum computing and quantum communication is quantum teleportation, which allows quantum information to be sent between distant nodes without actually sending the quantum particle. The teleportation process is fundamentally based on quantum entanglement, Bell state measurements, and classical communication channels, which collectively allow the accurate reconstruction of an unknown quantum state at a remote location. In recent years, rapid progress in integrated …
Published in Journal of Thin Films, Coating Science Technology & Application · Vol. 13, Issue 2, 2026 · pp. 01–19 Read article
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Multi-Sensor System for Underwater Pothole Detection to Enhance Road Safety During Monsoon Seasons
Abstract: Monsoon seasons across India and similar tropical regions severely compromise road safety by causing water accumulation that conceals dangerous potholes beneath stagnant pools, leading to frequent vehicle damage, tire punctures, and fatal accidents. Traditional detection methods relying on smartphone accelerometers, ultrasonic sensors, or machine vision fail under flooded conditions due to acoustic signal reflection at water surfaces and optical distortions from glare and turbidity. This research proposes an innovative multi-sensor …
Published in International Journal of Mechanical Dynamics and Systems Analysis · Vol. 4, Issue 1, 2026 · pp. 25–32 Read article
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Design of High-Speed and Low-Power Carry Skip Adder
Abstract: In this brief, we present a high speed and lower power consumption carry skip adder (CSKA) architecture compared with the conventional one. The increment of speed is attained by implementing concatenation and incrementation strategy to improve the efficiency of the conventional CSKA (Conv-CSKA) architecture. Instead of make use of multiplexer logic, the proposed architecture makes use of AND-OR-Invert (AOI) and OR-AND-Invert (OAI) combination gates for the carry skip logic. The …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 3, 2016 · pp. 35–44 Read article
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An Overview on MOSFET based Sensor Design
Abstract: In the past two decades the MOSFET has transformed from a simple switch in digital logic to an analog powerhouse that can be cofabricated with the sensing material on a single chip. MetalOxideSemiconductor FieldEffect Transistors (MOSFETs) have silently become the beating heart of modern sensor platforms, translating the faint whispers of physical, chemical, and biological phenomena into robust electrical signatures. This abstract surveys the latest advances that have turned the …
Published in Journal of Microelectronics and Solid State Devices · Vol. 13, Issue 1, 2026 · pp. 20–26 Read article