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45 articles for “Arithmetic operation”
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Vedic Mathematics in Algebra Techniques, and Problem-Solving Benefits
Abstract: The sixteen Sutras and thirteen Sub-Sutras form the foundation of Vedic algebraic mathematics. This article discusses the Buddha's teachings and shows how to use them to solve algebra problems. Unified mathematics is defined as a state where processes can refer to and understand each other. Vedic formulas, which can be utilized for addition, subtraction, division, and other mathematical operations, are taught with examples. Vedic mathematics not only saves time, but …
Published in Research & Reviews: Discrete Mathematical Structures · Vol. 12, Issue 1, 2025 · pp. 23–28 Read article
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A Study on Privacy Preserving Techniques in Data Mining
Abstract: Data Mining (DM) is the technique of examining data from specific summarizing and perspectives the outcome as useful information. It has been describing as "the non-trivial procedure of new, potentially helpful and ultimately conceivable patterns and identifying valid in data". The word “Knowledge” in KDD submits to the discovery of example which is removing since the processed data. Preserving privacy is becoming a key apprehension as personal data is publicly …
Published in Journal of Operating Systems Development & Trends · Vol. 5, Issue 2, 2018 · pp. 18–23 Read article
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Design and Simulation of Low Power Allow Area High Speed Carry Save Adder using CMOS 16 nm Technology.
Abstract: In this article, we propose a novel 1-bit hybrid full adder circuit that is implemented using eighteen transistors. Simulations are done using the Mentor Graphics Tool 16nm technologies. The performances are evaluated based on their speed, average power consumption, and power-delay product. The essential components of arithmetic units including compressors, comparators, parity checkers, etc. are full adders. Thus, raising the performance of the entire adder will raise the system's performance. …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 2, 2023 · pp. 17–28 Read article
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Building Knowledge with a Hands-on 8-bit CPU Architecture Simulation Kit for Students
Abstract: It is now crucial for students studying electronics and information technology to comprehend computer architecture and logic design. Hands-on, practical instruction is required to assist students in understanding Computer Organization and Architecture (COA). Our kit, which covers essential components including bus interfaces, arithmetic, and logic units (ALU), memory structures, and functional registers, is based on the Von Neumann architecture. Theoretical techniques like block diagrams and top level diagrams are typically …
Published in Journal of Electronic Design Technology · Vol. 15, Issue 3, 2024 · pp. 1–9 Read article
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Area and Speed Efficient Floating Arithmetic Logic Unit Implementation on Hybrid FPGAS
Abstract: Proposed design of an Area and Speed optimized field arithmetic logic unit (FALU) for modern computing of advanced processors, as we are aware that in most of the DSP (Digital Signal Processors) FALU is a critical component for continuous calculation of signs and ongoing information to meet the constant situation of sign handling it is exceptionally needed to make calculation quicker as could be expected so we have thought of …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 9, Issue 3, 2021 · pp. 29–34 Read article