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219 articles for “low power techniques”
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Design and Analysis of Energy-Efficient GDI Cell and Its Impact on Multipliers
Abstract: VLSI design technology suffers from three major issues such as area, speed and power. Among these issues, power is a serious concern that is yet to be considered. So, in this paper, power is concerned more as compared to area and speed. GDI (gate diffusion input) is one of the common techniques used in VLSI design systems to reduce power consumption. Due to its high performance and less area overhead, …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 2, 2014 · pp. 32–36 Read article
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Hardware and Power Efficient Single Bit Full Adder Using GDI and PTL Technique
Abstract: Abstract: This study presents hardware and power efficient single bit full adder which consists of two techniques, Pass Transistor Logic (PTL) and Gate Diffusion Technique (GDI). Several logic families are described by PTL which is utilized in the architecture of integrated circuits. PTL technique is used to decrease the number of transistors in the circuits to make different logic gates. GDI technique is utilized for the low power consumption. CADENCE …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 7, Issue 3, 2019 · pp. 9–17 Read article
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Optimization of a Digital Adder Design Using MOSFET and FinFET Technology
Abstract: AbstractIn this study, a very low power high speed Adder is presented by using short gate mode technique and voltage scaling system for FinFET. MOSFET and FinFET technique is used on 32 nm by adders which compare delay and average power. Parametric study of fins vs. power is also performed in the study. Synopsys HSPICE software is used for obtaining the simulation results. Simulation results show that low power is …
Published in Journal of Electronic Design Technology · Vol. 9, Issue 2, 2018 · pp. 30–33 Read article
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Modeling of Maximum Power Point Tracking Controllers for Wind Generation System using Hill Climb Searching Technique
Abstract: In this paper, based on a low-cost, small-scale application, presents a Maximum Power Point Tracking (MPPT) controller for wind generation systems (WGS). The Hill Climb Search approach served as the foundation for the development of the MPPT algorithm. To account for the inertia of wind turbines, an enhanced hill-climb searching approach has been created as a fundamental component of the max-power extraction algorithm. Under varying wind conditions, the generator can …
Published in Journal of Power Electronics and Power Systems · Vol. 13, Issue 3, 2023 · pp. 39–47 Read article
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Simulation of Single Phase AC-DC Power Factor Corrected Converter: A Technological Review
Abstract: This paper is intended to review the significant development of power factor correction by using boost converter topology for single phase power supply to the load in the last decay. Contents in this review paper starts with an introduction of power factor correction by boost converter topology adopted by many industries. Different power factor correction methods are available, which can be applied to get better power factor and low harmonic …
Published in Trends in Electrical Engineering · Vol. 6, Issue 1, 2016 · pp. 72–83 Read article
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Simulation of Three Section Multilevel Inverter with Reduced Range of Switches
Abstract: Because of high generation development, the demand and excellent of electric strength ishigher than earlier than. Furthermore, due to the advancement of semiconductor, thespecification of electricity devices and strength conversion method turn out to be stricter. Oneof the energy converters that may remodel DC to AC is called inverter. An inverter is the intermedium to transmit the electricity to other electric device such as an uninterruptibleelectricity supply, servo motor, air-conditioner …
Published in Journal of VLSI Design Tools and Technology · Vol. 10, Issue 1, 2020 · pp. 15–36 Read article
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R-M and M-R Model for Interpreting Logic State of Memristor Aided NOR with Enhanced Noise Margin
Abstract: Memristive crossbar arrays are one of the fascinating subjects in the field of nanoelectronics and memory devices. The arrangement of arrays consists of grid-like structure with rows and columns of memristors which are resistive devices that can preserve their resistance state even after power is turned OFF. They have now emerged as a promising alternative to traditional memory technologies due to their high density, non-volatility and low power consumption. This …
Published in Recent Trends in Mathematics · Vol. 1, Issue 1, 2024 · pp. 35–41 Read article
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Enhanced Shell Script Optimization Techniques for Low-latency Automation in DevOps Environments
Abstract: Shell scripting remains a foundational component in system administration and DevOps automation, providing a straightforward yet powerful method for automating tasks, managing system configurations, and integrating seamlessly within continuous integration and continuous delivery (CI/CD) pipelines. These scripts serve as the backbone for many repetitive and complex tasks, enabling IT teams to execute workflows efficiently without manual intervention. As organizations continue to scale their infrastructure and adopt more complex architectures, the …
Published in Journal of Advances in Shell Programming · Vol. 11, Issue 3, 2024 · pp. 1–5 Read article
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Edge-detecting Technique to Increase Slew Rate for Differential Amplifier
Abstract: This paper addresses a very compact low-power class-B buffer amplifier topology for large-size liquid crystal display applications. With enhanced slew rate, Edge-Detecting technique the proposed buffer achieves high-speed driving performance, draws a small quiescent current during static operation. The proposed SRE design is achieved more than 68 times improvements in the slew rate without significant increase of static power dissipation. Post-layout simulations show that the proposed buffer can drive a …
Published in Journal of Electronic Design Technology · Vol. 3, Issue 1-3, 2012 · pp. 49–58 Read article
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Design of Low Power Resistor Less Flash ADC for UWB Receiver Applications
Abstract: In this paper, two designs of flash analog to digital converters (ADCs) based on threshold inverter quantization (TIQ) technique are presented. The parallel threshold inverter quantization (PTIQ) flash ADC exploits the advantage of reduction in capacitance and power consumption if the transistors are placed in parallel. Another design called low voltage tunable body bias (LVTBB) PTIQ ADC operates at near threshold voltage level to minimize the power consumption. The PTIQ …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 3, 2016 · pp. 71–87 Read article
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Comparative Study of a 32 bit Clock Gated ALU based on Carry Skip Adder and Ripple Carry Adder
Abstract: The ALU is one of the most frequently accessed modules in a CPU and is utilized during most instruction executions. Hence the power consumption of the ALU is a major concern. In this paper a low power 32 bit ALU is designed using VHDL. Lower power consumption is achieved by using clock gating technique than conventional design. A carry skip adder with variable block length is used for the arithmetic …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 2, 2013 · pp. 6–11 Read article
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Reconfiguring CMOS Driver and Receiver Pair as Pseudo NMOS for Low-swing Signaling On-chip Interconnects
Abstract: The Low power bus architecture [9, 12, 13] consists of Driver, Receiver and Interconnects in between them inside the Chip. The Low power bus architecture [1] models are classified in to Symmetric and Asymmetric [7, 11, 14, 15] based on low voltage scaling technique and very simple design principles were utilized to construct driver, receiver and interconnects. The low power bus driver has the ability to switch from a low …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 1, 2013 · pp. 20–27 Read article
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Mitigation of Mobile Radio Parasitic Radiation Effects: A Review
Abstract: ABSTRACT In this paper, mitigation techniques useful for improving mobile radio systems power efficiency and decreasing electro-smog and specific absorption rate (SAR) induction, affecting human head and body, are presented. An analysis of main radiation effects from far field base stations and review of mitigation techniques for enhancing the efficiency of power transmission for mobile radio systems is shown, followed by an investigation of the complex radiation field components from …
Published in Journal of Communication Engineering & Systems · Vol. 2, Issue 1, 2012 · pp. 1–12 Read article
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Neuromorphic Spiking Neural Networks and Event-Driven Hardware: Architectures, Learning Paradigms, and Experimental Realizations
Abstract: With the current computational boom the research community is seeking for more sustainable energy efficient i.e. biologically inspired models of conventional Artificial Neural Networks (ANNs). Spiking Neural Networks (SNNs) known as the third generation of neural network models, provide a revolutionary approach by mimicking the asynchronized event-driven and temporally accurate signaling of the mammalian brain. Whereas conventional deep learning models operate with real-valued activations and dense matrix multiplications, SNNs use …
Published in Current Trends in Signal Processing · Vol. 16, Issue 2, 2026 · pp. 39–46 Read article
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Development of Polymer Based SRAM Cell with Enhance Low Power Performance
Abstract: Low-power memory technologies are in high demand with the rapid growth of portable electronics and energy-efficient computing systems. Static random-access memory (SRAM) plays a crucial role in processors, cache memories, and system-on-chip applications due to their speed and reliability. Static Random Access Memory (SRAM) is typically implemented using complementary MOS (CMOS) technology, which integrates both PMOS (P-channel Metal–Oxide–Semiconductor) and NMOS (N-channel Metal–Oxide–Semiconductor) transistors. However, as technology scales to deep submicron …
Published in Journal of Polymer & Composites · Vol. 14, Issue 1, 2026 · pp. 1439–1448 Read article
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Maximum Power Point Tracking Using PSO with Boost Converter
Abstract: Maximum power point tracking methods are used for extraction of maximum power from solar PV panels. The characteristics of non-line panel hinder the power output from the solar panel. Earlier proposed methods like hill climbing, incremental conductance suffer from steady state and lower efficiency. This proposed evolutionary computation technique assures nearly zero steady state oscillation and faster convergence of tracking maximum power. The PSO algorithm is tested on a DC-DC …
Published in Journal of Alternate Energy Sources & Technologies · Vol. 7, Issue 2, 2016 · pp. 17–27 Read article
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High Gain High Efficiency Single Switch DC–DC Converter for Green Power Source Conversion
Abstract: Efficiency of solar cell is very low and it is preferred to be operated at low voltages; so it is difficult to supply power to a certain load. Conventional boost converter offers limited gain. So a high voltage boosting is needed. Proposed converter consists of coupled inductor and switched capacitor technique to achieve high gain without high duty ratio and turns ratio. In the magnetic field of coupled inductor and …
Published in Journal of Power Electronics and Power Systems · Vol. 8, Issue 3, 2018 · pp. 46–56 Read article
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Hybrid CMOS-SET Inverter Design for Improved Performance using Tied Body-backgate Technique
Abstract: Single-electron transistors (SETs) are an attractive candidate for future functional elements in LSIs, because of their low-power consumption and small size. Integration of current CMOS technology with the emerging SET devices is an effective approach for improving density of integration in VLSI chips and ensuring ultra low power dissipation along with the advantages of CMOS technology like high gain, current drive, speed and matured fabrication technology. This paper investigates hybrid …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 1, 2015 · pp. 24–29 Read article
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A New Nine Level Hybrid Multilevel Inverter
Abstract: Multilevel inverters (MLI’s) have been used widely for high power and medium power DC-AC conversion. Researchers are working to reduce total effective cost and enhance the working efficiency of the multilevel inverter. This paper presents a new multilevel hybrid inverter which utilizes eight active powers electronics switches along with asymmetric DC voltage source configuration to synthesize 9-level waveform and produces lower total harmonic distortion (THD) profile comparisons to present typical …
Published in Trends in Electrical Engineering · Vol. 6, Issue 1, 2016 · pp. 17–25 Read article
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Design of Optimized Full Adder using Noise-Mitigation Techniques and Power Gating
Abstract: With the advent of nanoscale technology, a new era of power consumption, speed, and reliability challenges for traditional static CMOS logic has begun. To solve these problems, dynamic logic families—particularly domino logic—have emerged as potent substitutes that offer quicker processing speeds and lower power consumption. The design and optimization of a full adder circuit using domino logic is shown in this study. A dynamic domino logic technique is used to …
Published in Journal of Microelectronics and Solid State Devices · Vol. 11, Issue 3, 2024 · pp. 1–6 Read article