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22 articles for “VLSI CAD”
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Study and Analysis of Digital Counters for VLSI Applications
Abstract: AbstractThe counter is a fundamental and essential component. It is used in most digital devices. A counter is a sequential circuit that is used as a counter. The counter is the most widespread application of flip-flops. It is a group of flip-flops in which a clock signal is placed. A counter stores the number of processes related to a clock. It is classified into two categories. The number of flip-flops …
Published in Recent Trends in Programming languages · Vol. 7, Issue 3, 2020 · pp. 17–24 Read article
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The Integration of Machine Learning in VLSI IC Design
Abstract: It represents the first use of AI in the domain of integrating circuits, which has been impacted by it. The conventional VLSI design process that is now in use is replaced by this technology. The laborious manual concepts created by people have been replaced with automated design innovations. This development would trigger a profound change in the fields of AI education and hardware computation. With the introduction of contemporary chips, …
Published in Trends in Machine design · Vol. 11, Issue 2, 2024 · pp. 1–8 Read article
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Area and Power Improvement with New Initial Ordering Method Combined with Sift Algorithm for BDD Mapped Circuits
Abstract: Digital circuits are the important elements in almost every electronic design. As the size of electronic ICs are shrinking rapidly, the minimization of the circuit elements and power consumption became more focused area of VLSI research. In this paper, we have introduced a new method for reduction of area and power of binary decision diagram mapped circuits. Binary decision diagrams are used to represent digital functions in VLSI CAD. It …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 2, 2018 · pp. 67–71 Read article
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Hybrid Quantum-Classical Reinforcement Learning Enabled Thermal-Aware Electronic Design Automation Framework for Energy-Efficient Next-Generation VLSI Systems Applications
Abstract: Modern Very Large-Scale Integration (VLSI) systems are becoming more complicated, which has increased need for sophisticated Electronic Design Automation (EDA) frameworks that can concurrently optimise thermal behaviour, power consumption, and performance. This study proposes a Hybrid Quantum-Classical Reinforcement Learning (HQCRL) Enabled Thermal-Aware EDA Framework for next-generation energy- efficient VLSI systems. The proposed framework integrates quantum-inspired optimization techniques with classical reinforcement learning algorithms to address the challenges of placement, routing, and …
Published in Journal of Electronic Design Technology · Vol. 17, Issue 2, 2026 · pp. 10–22 Read article
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A Survey on the various Adibatic Logic Styles used for Circuit Design in IOT & WSN Applications
Abstract: Abstract— This paper describes about different adiabatic logics are used which are all used to provide low power and high speed. Low power circuits and designs are the need of the hour as they find applications in electronic components which have power efficient processing capabilities. For IOT based applications we need to design low power VLSI circuits that utilize adiabatic logic in order to enhance the security and reduce the …
Published in Journal of Microcontroller Engineering and Applications · Vol. 9, Issue 2, 2022 · pp. 1–5 Read article
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Efficient AES for Biometric Image Signal Processing
Abstract: Abstract: Several computation schemes and architectural designs have been suggested during the last three decades for efficient hardware implementation of biometric applications. The biometric application of advanced encryption standard (AES) algorithm in high texture image signal processing. The proposed AES very large-scale Integration (VLSI) architecture has 16 % and 15 % less dynamic power consumption and LUT utilization then available best design available AES architecture in the presented literature survey. …
Published in Current Trends in Signal Processing · Vol. 9, Issue 1, 2019 · pp. 7–9 Read article
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The Evolution of Digital Integrated Circuits: A Journey Through Technological Advancements
Abstract: The evolution of digital integrated circuits (ICs) is a remarkable journey that has transformed the worldof technology over the past several decades. This abstract provides an overview of the comprehensivearticle that explores this evolution. The journey begins with the birth of digital integrated circuits in thelate 1950s and early 1960s when the first ICs containing a small number of transistors emerged. Theseearly ICs laid the groundwork for a technological revolution …
Published in Journal of Microcontroller Engineering and Applications · Vol. 10, Issue 2, 2023 · pp. 15–18 Read article
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Time Domain Analysis in an On-chip High Speed RLCG Interconnection Network at 0.18 µm Technology
Abstract: In this model, the time domain waveform is evaluated for calculation of delay time, peak time, settling time, damping ratio and natural frequency for a second order RLCG interconnect network. It can also be used for multiple interconnect systems but for higher order systems it is ignored due to accurate analysis. The model is applied to a single resistance-inductance-capacitance-conductance model which can also be extended to multi-interconnect systems to analyze …
Published in Journal of VLSI Design Tools and Technology · Vol. 1, Issue 1-2-3, 2011 · pp. 57–67 Read article
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Design of Active Filter using CMOS based IInd Generation Current Conveyor in Current Mode
Abstract: Traditional design techniques used in VLSI are in voltage mode, but these have drawbacks like low bandwidth, non-linearity and less gain. Current conveyors act similar to operational amplifiers but are advantageous over older VLSI design techniques because of high bandwidth-gain product, reduced power consumption etc. This paper consists of two parts: circuit diagram of current conveyor (which is a three terminal analog device) is discussed first and its working is …
Published in Journal of VLSI Design Tools and Technology · Vol. 9, Issue 1, 2019 · pp. 15–21 Read article
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Comparative Study of (Operational Transconductance Amplifier) OTA to Design Low Pass Filter
Abstract: Basic building block to design an analog circuit is amplifier and it is used for such applications like analog to digital and digital to analog converter, sensor network and many more. Amplifier with lofty gain and high bandwidth will increase the efficiency of design. Present time is talking about development of VLSI technology and everything is related to size of transistor and decreasing power supply in a circuit. Operational transconductance …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 2, 2015 · pp. 11–15 Read article
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Efficient Analysis and Minimization of Glitches using Threshold Swapped Combinational Clock Gating
Abstract: Nowadays design of electronic circuits to meet requirements like high speed, better functionality and low power is a tedious task. Power dissipation in any circuit comprises mainly two components: static power and dynamic power. The dynamic power heavily depends on the switching activity of the circuit. During the transistor switching transitions some spikes may occur, which are called as glitches. These glitches contribute 20–70% of the dynamic power and 20% …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 2, 2015 · pp. 29–37 Read article
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4-Bit Magnitude Comparator Design using Different Logic Styles
Abstract: 4-Bit Magnitude Comparator using various logic styles is explained here. Comparison is one of the common arithmetic operations that is used to determine which number is greater, equal to, or less. Every device from OP-AMP to ALU needs to perform comparison operations. At designing level, comparator can be designed by using different logic styles. Here, comparison is done for simple 4-Bit combinational comparator and cascaded comparator which we have designed …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 2, 2015 · pp. 16–22 Read article
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High Speed and Low Power Basic Digital Logic Gates, Half-Adder and Full-Adder Using Modified Gate Diffusion Input Technology
Abstract: In this paper, modified gate diffusion input (MGDI) technology has been used for the design and implementation of digital integrated circuits (ICs). In today’s digital world, IC plays a vital role in high-performance computing, communication, and many consumer electronics. IC manufacturing technology has scaled down to smaller device dimensions. This scaling has a great impact on the design of digital ICs. The main objective of the IC manufacturing technology is …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 1, 2018 · pp. 34–42 Read article
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VLSI Implementation of Bit/Digit Serial-Parallel Finite Field GF (2m) Multiplier Using Standard Basis
Abstract: A Finite Field is a field with finitely number of elements. It is also known as Galois field in which the elements can take q different values is referred as GF (q).Finite fields are of great interest in applications like Elliptic Curve Cryptography (ECC), error control and coding. In this paper, we present a simple implementation of finite field GF (2m) multiplier. Here the main aim is to enhance the …
Published in Journal of Semiconductor Devices and Circuits · Vol. 1, Issue 3, 2014 · pp. 1–6 Read article
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Design and Performance Analysis of Multi-Standard CMOS LNA Using Switched Capacitor and MIM Capacitor in 180nm Technology
Abstract: Low noise amplifier (LNA) is terribly important block in designing broadband receivers for wireless broadband communications. Being the primary active element in receiver chain it creates larger demand for LNAs that are smaller, consume less power, and provide sufficient gain, low noise and high compact design. The projected LNA is extremely integrated with low noise figure having wide calibration range with improved RF power handling system and acquires less space …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 3, 2015 · pp. 37–44 Read article
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Design and Implementation of A 4-bit Multiplier using Wallace Tree Architecture in 180 nm Technology
Abstract: Over the period of last decade, power dissipation has become one of the most important factors for VLSI designers in the design of most digital systems. Even though the speed and area are considered to be the critical factors in design of digital systems, there is a trade of with power consumption. Adders and multipliers are the most important arithmetic units in a processor and the major sources of power …
Published in Journal of Microcontroller Engineering and Applications · Vol. 2, Issue 1, 2015 · pp. 17–23 Read article
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Reduce the Leakage Current and Power in VLSI Technology
Abstract: Demand for portability Reduce and increase in size, low cost, low dynamic power, low leakage current, low sub threshold current, and the necessity to minimise at least one of these. Circuit complexity increases with circuit integration. Memory and microprocessors are included in mass-produced chips. Microcomputer systems central system memory uses dynamic random-access memory (DRAM). One benefit of DRAM memory is its high speed and capacity integration. The examination of DRAM …
Published in Journal of VLSI Design Tools and Technology · Vol. 13, Issue 3, 2023 · pp. 19–25 Read article
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Low power high performance CMOS Schmitt Trigger using nanoscale CMOS Technology
Abstract: This paper presents different low voltage adjustable CMOS Schmitt trigger at 90nm technology. This paper proposes the transient response and noise response analysis of CMOS Schmitt trigger circuit which will give noisy input signals with less noise response and also applicable for low power. It enumerates reduction of power consumption, which is in major demand in the field of VLSI. The CMOS device is used to achieve better power consumption, …
Published in Journal of Mobile Computing, Communications & Mobile Networks · Vol. 5, Issue 1, 2018 · pp. 28–35 Read article
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Low-power, High-speed, Full-swing Hybrid Full Adder
Abstract: Abstract: Nowadays VLSI design demands low area and low-power consumption. In this study, a low-power, high-speed, full-swing 1-bit hybrid full adder is proposed. The hybrid full adder is decomposed into three sub-modules. For each sub-module, designs are different. Module 1 and 2 are designed using pass transistor logic (PTL) and Module 3 uses transmission gates to produce carry signal. Then by proposed low-power, high-speed hybrid full adder circuits play a …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 7, Issue 3, 2019 · pp. 22–29 Read article
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Memristor Modelling for Common Source Amplifier Using 180 nm Technology
Abstract: The objective of this research paper is on memristor modeling for common source amplifier circuit using cadence virtuoso tool at gpdk 180 nm technology. A memristor is the fourth element count after resistor, inductor and capacitor in fundamental electrical circuits assumption is proposed by Leon Chua, its characteristics is based on already occurred principles of voltages (V), current (I), flux (ᵩ) and charge (q). Ohm’s law states relation voltage to …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 3, 2015 · pp. 45–54 Read article