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12 articles for “DSP”
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Design & Implementation of 16-BIT MAC Unit Using Vedic Mathematics
Abstract: Multiply and Accumulate (MAC) units are essential parts of digital systems, particularly in embedded systems, digital signal processing (DSP), and image processing. The performance of these systems is significantly impacted by how well the multiplication process works. The design and construction of a fast 16-bit MAC unit utilizing Vedic mathematics are presented in this study.The proposed design utilizes the Urdhva Tiryagbhyam sutra to perform multiplication in a parallel manner, reducing …
Published in Journal of VLSI Design Tools and Technology · Vol. 16, Issue 1, 2026 · pp. 52–58 Read article
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MAC Unit Implementation on FPGA
Abstract: Multiply–accumulate (MAC) computations account for a large part of machine learning accelerator operations. The pipelined structure is usually adopted to improve the performance by reducing the length of critical paths. An increase in the number of flip-flops due to pipelining, however, generally results in significant area and power increase. Using this method, we create and build a cutset-free feedforward MAC architecture that maximizes data propagation and removes superfluous pipeline registers. …
Published in Journal of Microcontroller Engineering and Applications · Vol. 13, Issue 1, 2026 · pp. 29–37 Read article
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From Noise to Insight: An Academic Study of Electrical Signal Processing
Abstract: Electrical signal processing is very important for turning raw, often noisy data into useful and actionable information. This article gives a simple and easy-to-understand summary of the basic ideas and methods used in electrical signal processing, such as filtering, signal representation, modulation, and spectrum analysis. The focus is on how to effectively eliminate noise and interference to improve the quality and dependability of signals. The conversation connects ideas from theory …
Published in Current Trends in Signal Processing · Vol. 16, Issue 1, 2026 Read article
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Machine Learning–Guided Cognitive RF System with Dynamic FFT Resolution and Multiplier Reconfiguration for Adaptive Anti-Jamming Communication
Abstract: This paper presents a hierarchical adaptive RF communication system that integrates signal quality-based pre- processing with machine learning-driven signal classification to achieve robust and resource-efficient operation in dynamic, interference-prone environments. Unlike prior art that addresses adaptive RF, ML classification, or anti-jamming individually, this work uniquely combines real-time SNR/RSSI-based signal strength estimation with dynamic FFT size selection (64-, 256- , or 512-point) and arithmetic-level multiplier reconfiguration (CORDIC, Distributed Arithmetic, and hybrid …
Published in International Journal of Radio Frequency Innovations · Vol. 4, Issue 1, 2026 Read article
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Power Estimation Approach for Artix 7 FPGA using Machine Learning Technique
Abstract: This paper presents the power estimation approach using a suitable machine learning technique. Artix7 FPGA has been chosen as the target FPGA (Field Programmable Gate Arrays) platform for understanding the methodology of power estimation. There are various approaches of power estimation for FPGAs that have been given in the literature viz. probabilistic, statistical, and LUT- based, etc. In the past few years, the demand for hand-handled devices like smartphones, tabs, …
Published in Research & Reviews: A Journal of Embedded System & Applications Read article
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Graphene–Perovskite Hybrid Opto-Electronic Modulators for Ultra-Low Power Optical Communication
Abstract: This paper proposes a novel self-adaptive neuromorphic opto-electronic transceiver architecture designed to enhance the intelligence, adaptability, and efficiency of next-generation optical communication networks. The proposed system integrates neuromorphic computing principles with photonic signal processing to enable real-time learning, dynamic resource allocation, and autonomous compensation of channel impairments such as dispersion, nonlinearities, and noise. Unlike conventional transceivers, the developed model employs spiking neural networks embedded within opto-electronic circuits to mimic biological …
Published in Trends in Opto-electro & Optical Communication · Vol. 16, Issue 1, 2026 · pp. 41–52 Read article
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Status of Open Source Software for Digital Libraries in Telangana (A Study Conducted on Private Colleges)
Abstract: The purpose of this paper is to highlight the importance of digital libraries and digital resources through open source software which is highly in demand in the private colleges of Telangana. This study was conducted in 123 private colleges of Telangana only. These colleges were divided subjectwise like Engineering, Pharmacy, and Management. This paper is based on survey methodology and a sampling technique was used for the collection of data. …
Published in Journal of Advancements in Library Sciences Read article
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FPGA Enabled Flight Control Unit
Abstract: The FPGA flight controller revolutionizes drone technology with unmatched stability and precision. Integrated with an IMU and advanced sensors like the MPU 6050, it ensures accurate positioning critical for reliable UAV operation. Its efficient real-time data processing and seamless sensor communication enhance performance and reliability across various conditions. This advancement sets a new standard in UAV technology, suitable for applications ranging from surveillance to disaster relief. An aircraft's flight control …
Published in Journal of Aerospace Engineering & Technology · Vol. 14, Issue 1, 2024 · pp. 19–25 Read article
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Digital Archiving in Higher Education: The Role of Institutional Repositories in Maharashtra’s State Universities
Abstract: Digital archiving plays a pivotal role in the preservation, organization, and dissemination of scholarly materials in the landscape of higher education. With the exponential growth of digital content and the increasing need for open access, institutional repositories (IRs) have emerged as essential platforms for ensuring the long-term accessibility, security, and visibility of academic resources. These repositories facilitate seamless academic collaboration, improve the discoverability of research outputs, and enhance the overall …
Published in Journal of Advancements in Library Sciences · Vol. 12, Issue 2, 2025 · pp. 31–36 Read article
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Performance Comparison of Noise-Tolerant, High- Performance CMOS Domino Logic Configurations
Abstract: In high-performance VLSI chip design, domino logic configuration is often preferred over static logic due to its faster operation and smaller area footprint, especially in deep submicron (DSM) technology. However, DSM noise has become a significant challenge in domino-based circuits, leading to compromises in the reliability and signal integrity of integrated circuits (ICs). The switching threshold of domino logic, defined as the input voltage level at which the gate output …
Published in Journal of Semiconductor Devices and Circuits · Vol. 12, Issue 2, 2025 · pp. 35–50 Read article
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Design and Implementation of 256-bit Vedic Multiplier on Reconfigurable Platform
Abstract: Multiplication is a fundamental arithmetic operation in digital signal processing and embedded systems. Traditional multiplier architectures often suffer from increased latency and resource utilization when scaled to higher bit widths. Vedic Mathematics, an ancient Indian technique, offers a novel and efficient alternative. This paper presents the design and implementation of a 256-bit Vedic multiplier using the Urdhva Tiryakbhyam Sutra on a reconfigurable hardware platform, specifically FPGA. The proposed architecture decomposes …
Published in Journal of Materials & Metallurgical Engineering · Vol. 15, Issue 3, 2025 · pp. 56–65 Read article
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Optimized Hardware Realization of AES for High-Throughput FPGA Platforms
Abstract: The Advanced Encryption Standard (AES) is the predominant symmetric-key cryptographic algorithm used for securing digital communication across embedded systems, IoT devices, cloud infrastructures, and defense networks. Although software-based AES implementations offer flexibility, they often fail to meet the high-speed, low-latency, and energy-efficient requirements of modern real-time applications. Reconfigurable hardware platforms such as Field-Programmable Gate Arrays (FPGAs) provide a powerful alternative by enabling architectural customization, intrinsic parallelism, and optimized hardware acceleration. …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 3, Issue 2, 2025 · pp. 11–22 Read article