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39 articles for “CPU”
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A Reviewed Study On Cpu-Optimized Parameter-Efficient Fine- Tuning For Large Language Models To Increase Accuracy Using Lora
Abstract: The fast proliferation of Large Language Models (LLMs) has increased the need to optimize the process of fine-tuning but the existing workflows that require a GPU are still expensive, intensive, and unavailable to most researchers. This paper is driven by the desire to have a more cost-efficient and democratized version by examining a CPU-efficient implementation of Parameter-Efficient Fine-Tuning (PEFT) based on Low-Rank Adaptation (LoRA). The major purpose of the study …
Published in Recent Trends in Parallel Computing · Vol. 13, Issue 1, 2026 Read article
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Review JoEDT N58 Open CPU-Based Milk Collection System
Abstract: The N58 Open CPU-based milk collection system is designed to enhance the efficiency and transparency of milk collection processes in rural and urban dairy operations. By integrating a computerized platform with open-source technology (Open CPU), the system enables real-time monitoring, automatic data logging, and streamlined milk collection from multiple sources. The system allows farmers to register and track their milk deliveries, monitor milk parameters such as fat content and volume, …
Published in Journal of Electronic Design Technology · Vol. 16, Issue 2, 2025 · pp. 17–23 Read article
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Building Knowledge with a Hands-on 8-bit CPU Architecture Simulation Kit for Students
Abstract: It is now crucial for students studying electronics and information technology to comprehend computer architecture and logic design. Hands-on, practical instruction is required to assist students in understanding Computer Organization and Architecture (COA). Our kit, which covers essential components including bus interfaces, arithmetic, and logic units (ALU), memory structures, and functional registers, is based on the Von Neumann architecture. Theoretical techniques like block diagrams and top level diagrams are typically …
Published in Journal of Electronic Design Technology · Vol. 15, Issue 3, 2024 · pp. 1–9 Read article
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Design and Implementation of a 4-Bit Breadboard CPU Using Digital Integrated Circuits
Abstract: This paper presents the design and hardware realization of a simple 4-bit CPU built using discrete TTL integrated circuits on a breadboard. The CPU employs a 4-bit common data bus with tri-state buffers for device arbitration, three 4-bit registers (Register A, Register B, and an Output Register) implemented with 74LS175 quad D flip-flops, and a 4-bit ALU for addition/subtraction using a 74LS83 adder and XOR gates. Manual control signals (load, …
Published in Journal of Electronic Design Technology · Vol. 17, Issue 2, 2026 Read article
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An Optimised CPU Scheduling Algorithm with Adaptive Time Quantum Approach
Abstract: CPU scheduling is an essential mechanism implemented by the operating system to determine the execution of multiple processes by the CPU. The primary objective of the scheduling algorithms is to optimize the systems’ performance efficiently. The performance of a CPU scheduling algorithm depends on various factors and can be evaluated on various criteria like average turnaround time, average waiting time, throughput, fairness etc. This paper aims to present an optimal …
Published in Journal of Operating Systems Development & Trends Read article
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Parallel and Concurrent Computing with Shell Commands: Exploring CPU Architecture, LAN Interconnection and Command Languages for Green Sustainability
Abstract: Parallel and concurrent computing are essential ways of thinking in the digital age, where the cost indexes are efficiency, speed and sustainability. By far performance relevance of each metaphor Contemporary computational environments covering everything from dumb terminals to distributed workstations and intelligent network systems such as the command-line interface (CLI) can never do well on its performance when throughput is needed most the era's fact that there is no hitting …
Published in Journal of Advances in Shell Programming · Vol. 12, Issue 3, 2025 Read article
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Systematic Review of Application of Nature-Inspired Algorithms for Resource Optimization in Multi-Programmed Operating Systems
Abstract: Multi-programmed operating systems are increasingly confronted with complex challenges in efficiently managing system resources, primarily due to the need to handle numerous concurrent processes with diverse and often conflicting resource demands. As these systems evolve, ensuring optimal performance across various dimensions, such as CPU scheduling, memory allocation, and load balancing, has become crucial. In this context, nature-inspired algorithms have emerged as promising solutions for enhancing resource optimization. These algorithms, which …
Published in Journal of Operating Systems Development & Trends · Vol. 12, Issue 2, 2025 · pp. 08–14 Read article
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Visualizing Complexity: Navigating Algorithms with Algorithm Visualizer
Abstract: We think that studying algorithms may be amusing and exciting. Many students are currently struggling, but we hope to change that. Our strategy is to emulate gaming while learning. We're building hands-on learning exercises, such as mazes and patterns, to convey key concept. To help students understand how algorithms function in practice, we also use some stunning visualizations. Three major categories of algorithms are under our purview: sorting, pathfinding, CPU …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 2, Issue 1, 2024 · pp. 21–26 Read article
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Dealing with Hardware of the Computers: An Analytical Study
Abstract: The evolution of computer hardware has been pivotal in shaping modern computing capabilities, impacting both personal and professional spheres. This study offers a thorough overview of essential hardware components, such as the central processing unit (CPU), memory, storage devices, motherboards, and input/output peripherals. It explores how advancements in hardware technology, such as the transition from mechanical hard drives to solid-state drives (SSD) and the development of multi-core processors, have enhanced …
Published in Journal of Computer Technology & Applications · Vol. 16, Issue 1, 2025 · pp. 12–21 Read article
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Design and Implementation of Low Power and Area Efficient Sub Threshold Level Shifter Using 16 nm CMOS Technology
Abstract: An efficient method of modifying subthreshold voltages is proposed here. As an alternative to static power dissipation, the suggested design allows for charging of internal nodes through VDDH. The force of the pull-down mechanism may be increased by connecting a second auxiliary circuit. The transition energy for input frequencies between 1 and 5 MHz is 84 fJ, the propagation delay is 46 ns, the dynamic power dissipation is 0.3 mW, …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 1, 2023 · pp. 16–24 Read article
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Performance and Reliability Analysis of NAND Flash Memory through Characterization
Abstract: An extensive review of NAND flash memory technology is given in this study, with an emphasis on its design, guiding principles, and most recent developments. The importance of NAND flash memory in contemporary digital storage systems is discussed in general terms, emphasizing how widely used it is in everything from consumer electronics to business storage solutions. The underlying architecture of NAND flash memory, including the arrangement of memory cells, pages, …
Published in Journal of VLSI Design Tools and Technology · Vol. 14, Issue 2, 2024 · pp. 21–27 Read article
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Emerging Paradigms in Parallel Computing: Trends and Innovations
Abstract: Parallel computing is at an inflection point with revolutionary new paradigms and technologies. The goal of this paper is to survey the recent trend in parallel computing from architecture, programming model and applications. Mahajan cites a litany of architectural developments such as heterogeneous computing systems with integrated graphics processing unit/central processing unit ; the emerging promise from quantum and neuromorphic architectures (please see later); advances in packing transistors using novel …
Published in Recent Trends in Parallel Computing · Vol. 12, Issue 1, 2025 · pp. 39–43 Read article
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Enhanced Shell Script Optimization Techniques for Low-latency Automation in DevOps Environments
Abstract: Shell scripting remains a foundational component in system administration and DevOps automation, providing a straightforward yet powerful method for automating tasks, managing system configurations, and integrating seamlessly within continuous integration and continuous delivery (CI/CD) pipelines. These scripts serve as the backbone for many repetitive and complex tasks, enabling IT teams to execute workflows efficiently without manual intervention. As organizations continue to scale their infrastructure and adopt more complex architectures, the …
Published in Journal of Advances in Shell Programming · Vol. 11, Issue 3, 2024 · pp. 1–5 Read article
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Thermal Steganography: A New Way to Steal Data from Air-Gapped Computers Using Heat and Fan Noise
Abstract: Nowadays, high-security computers are "air-gapped," meaning they are not connected to the internet to prevent hacking. Cybercriminals are increasingly using direct, physical methods to access and take data instead of relying on internet-based attacks. This paper introduces a new cybersecurity threat called Thermal-Secret. Most existing heat-based attacks are very slow and fail if the room temperature changes. To solve this, we developed a Slope-Based method. Instead of looking at how …
Published in International Journal of Information Security Engineering · Vol. 4, Issue 2, 2026 Read article
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Resilient Shell-Based Frameworks for Edge and IoT Systems: A Comprehensive Analysis of Lightweight Automation in Distributed Environments
Abstract: Edge computing and Internet of Things (IoT) deployments require automation solutions that minimize resource use while supporting real-time processing and intermittent connectivity. This study investigates shell-based frameworks for managing distributed edge and IoT systems, with emphasis on sensor integration, live monitoring, and fault recovery. Drawing from 200 real-world deployment cases across smart city, healthcare, and industrial domains, the analysis compares shell scripting directly against containerized approaches (e.g., Docker with lightweight …
Published in Journal of Advances in Shell Programming · Vol. 13, Issue 1, 2026 · pp. 01–07 Read article
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Comparison of Various Load Balancing Algorithms in Cloud Computing
Abstract: The components associated with distributed computing are customers, datacenter and appropriated server. One of the principal issuesin distributed computing isload adjusting. Adjusting the heap intends to circulate the outstanding task at hand among a few hubs uniformly so no single hub will be over- burden. Burden can be of any kind that is it very well may be CPU load, memory limit or system load. Right now, introduced a design …
Published in Recent Trends in Parallel Computing Read article
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Card Fraud Detection Using Artificial Neural Network and Multilayer Perception Algorithm
Abstract: Fraud has posed a significant challenge for merchants, especially in the online business sector, over the course of many years. This is primarily due to the advancements in technology that have made credit card transactions a common method of payment. Credit card fraud refers to the unauthorized use of a credit card by an individual for personal purposes, without the owner's consent and with no intention of paying for the …
Published in International Journal of Algorithms Design and Analysis Review · Vol. 1, Issue 1, 2023 · pp. 21–30 Read article
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Designing Digital Filters of Underwater Wireless Sensor Node
Abstract: Underwater Wireless Sensor Networks (UWSNs), an emerging area, integrate sensing, computing, and communication into a single compact device. The digital data is acquired using an FPGA (Field Programmable Gate Array), and the fusion of numerous sensor data is accomplished in the sensor node’s ARM (Advanced RISC Machine) CPU. The sensor interfacing circuit should connect the sensor to the sensor node’s data collecting system. The data from these sensors may be …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 1, 2023 · pp. 43–53 Read article
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Study and analysis of the Double Data Rate SDRAM Controller for High-speed Interfacing with Processing Device
Abstract: A real-time embedded system must now manage many programs running concurrently. Increased Data Rate Because of its burst access, speed, and pipeline features, synchronous DRAM is a typical memory-building material. DDR transfers are performed using synchronous dynamic access memory. The memory controller must be set with a pipelined design for various applications and systems to perform effectively. The purpose of this study is to design a DRAM controller that will …
Published in Journal of VLSI Design Tools and Technology · Vol. 14, Issue 1, 2024 · pp. 8–13 Read article
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Design and Implementation of High-Speed Low Power Low Area Hybrid One Bit Full Adder Using CMOS Technology
Abstract: In this article, we'll take a look at a new kind of Full Adder (FA) design that mixes traditional Complementary Metal Oxide Semiconductors (CCMOS) with Pass Transistors (PTs) and Transmission Gates (TGs). To analyze the circuit's performance, we used the Mentor Graphics software package. Since all twenty (20) varieties of Full Adder circuits were able to be measured and compared, this research was conducted. When the clock rate of the …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 2, 2023 · pp. 29–39 Read article