transistor
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Design and Simulation of 4-bit Multiplier using Carry Look-Ahead Adder at Transistor Level
Abstract: Multiplication is a basic operation performed in the Arithmetic Logic Unit, Digital signal processing, Floating-point unit and Application specific integrated circuits. This paper deals with the design and simulation of the 4-bit multiplier using a carry look-ahead adder at the transistor level. The total design process involves hierarchical implementation. Where the basic gate operations like AND, OR, NOT, and XOR are repeatedly used for designing the entire circuit. So, the …
Published in Journal of VLSI Design Tools and Technology · Vol. 11, Issue 3, 2021 · pp. 10–18 Read article
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On a Nanocomposite Metal Oxide Thin-film Transistor with Nanofilm Gate Dielectric Material: Material Chemistry, Sol–Gel Process and Electronic Worthiness
Abstract: ABSTRACT : ILO based MOTFT is fabricated with PBZ gate dielectric. PBZ is formed over doped Si substrate by cheap sol-gel process. Thin film PBZ is analysed with XRD, UV-Vis and AFM. IZO is used as bottom gate to contact TFT. This device needs only 5V as operating voltage, and so is good for lower electronics <40V. It shows excellent e-mobility 4.5cm2/V/s, with on/off ratio 5x105 and sub-threshold swing 0.35V/decade.
Published in Journal of Thin Films, Coating Science Technology & Application · Vol. 6, Issue 3, 2019 · pp. 8–12 Read article