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4 articles for “lock in amplifier”
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Thermistor based ultra-sensitive thermal probe and its signal processing methods suitable for solution calorimeter
Abstract: A sensitive thermometric probe to measure a minute change in temperature of the order of mK, is designed and developed as a prerequisite for the in-house development of solution calorimetry system to study the heat of solutions of the compounds containing alkali metals. A measurement range of 2 K is considered in commensurate with the volume of the solution and the sample size. In this paper, construction of the probe …
Published in Journal of Instrumentation Technology & Innovations · Vol. 2, Issue 2, 2012 · pp. 23–31 Read article
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Design of Ultrafast Optical Full Subtractor Link and Performance Analysis
Abstract: AbstractThis article illustrates proposed optical full subtractor schematic through SOA-MZI, yield borrow and difference outputs concurrently. The objective has been accomplished by exploiting nonlinear attributes with SOA. Numerical simulations have been executed and craving optical subtractor output waveforms have been verified at 100 Gbps data rate. Optimization criterion for the design’s performance measurement is taken as Q-factor and the extinction ratio factor. The subtractor output difference and borrow outcomes with …
Published in Trends in Opto-electro & Optical Communication · Vol. 7, Issue 3, 2017 · pp. 7–20 Read article
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Implementation of DCC technique using differential amplifier based filter in 90nm CMOS technology
Abstract: Analog technique with feedback loop is applied to correct the duty cycle of any circuit without using more power. Pulse width modification is used to vary the duty cycle of clock signal. PMC cell is designed for expansion and contraction of pulse width. Differential amplifier based filter is used to detect the duty cycle of the particular clock signal. Differential amplifier and OpAmp are used to achieve adequate gain. The …
Published in Journal of VLSI Design Tools and Technology · Vol. 9, Issue 2, 2019 · pp. 13–22 Read article
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Designing of Low Power Charge Pump Circuit with Minimum Current Mismatch for High Speed PLL Applications
Abstract: Charge pump (CP) is one of the necessary block of phase locked circuit (PLL). This paper presents the new design of CP circuit, i.e., cascode current source biased transmission gate based CP circuit. Cascode current mirror, transmission gate switches and unity gain follower amplifier are combined to design the CP circuit in 65 nm technology. The reference current is used to bias the switches of CP circuit so that current …
Published in Journal of Electronic Design Technology · Vol. 6, Issue 3, 2015 · pp. 1–8 Read article