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6 articles for “floating gate”
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Optimization of FLOTOX in EEPROM Design
Abstract: Abstract: Electrically Erasable Programmable Read-Only Memory (EEPROM) is a non-volatile memory (NVM) which is used in computers, integrated into microcontrollers for smart cards and remote keyless system, and other electronic devices to store relatively small amounts of data but allowing individual bytes to be erased and reprogrammed. Here the sizes of the floating gate & control gate have been altered to find the impacts for programming events and determine the …
Published in Journal of Semiconductor Devices and Circuits · Vol. 6, Issue 1, 2019 · pp. 1–9 Read article
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Analysis of Operational Transconductance Amplifier using Low Power Techniques
Abstract: The paper presents a low power design of Current Mirror based Operational Transconductance Amplifier. The analysis of operational transconductance amplifier has been carried out using conventional gate-driven and low power techniques realised with quasi-floating gate, bulk-driven and bulk-driven quasi-floating gate transistors. The comparative analysis of performances of the amplifiers designed using the above techniques indicate that the best performance is achieved by bulk-driven quasi-floating gate approach. Using bulk as input, …
Published in Journal of Semiconductor Devices and Circuits · Vol. 2, Issue 1, 2015 · pp. 14–22 Read article
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Coarse-grained Logic Interface with Floating-point Arithmetic Unit: A Review
Abstract: One of the key elements of their design, which has a substantial impact, is their choice of programmable connectivity and logic capabilities. The FPGA architecture has a significant impact on the speed performance, space efficiency, and power consumption of the finished device. This examination examines the evolution of programmable logic devices over time, the underlying programming paradigms that underpin programmability, and the most important findings from architectural system research. We …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 11, Issue 2, 2023 · pp. 18–24 Read article
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Study And Literature Analysis of The Coarse-Grained Logic Interface with Floating-Point Arithmetic Unit
Abstract: Field-Programmable Gate Arrays (FPGAs) have become an essential digital circuit implementation techni que. The research looks at the design parameters by evaluating the building of an arithmetic logic unit (ALU) in Xilinx Vivado utilizing Hardware Description Language (HDL) and implementing common Field Programmable gate arrays (FPGAs). The ALU is a logic design component in digital computers that seeks to deliver optimal algorithms to maximize the usage of available hardware. The …
Published in Journal of VLSI Design Tools and Technology · Vol. 13, Issue 2, 2023 · pp. 45–55 Read article
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Concept Design of a Simple Marine Dry Dock (Without Gate)
Abstract: This article explores various options for facilities used in underwater ship repair, including Dry Dock, Ship Lift systems, Floating Dry Docks, and Simple Slipway systems with cradle and winch. Such facilities are crucial to any ship repair operation. Among these, Dry Docks are known for their high capital cost and limited capacity to repair only one ship at a time. This makes them less appealing unless there is substantial demand …
Published in Journal of Offshore Structure and Technology · Vol. 11, Issue 3, 2024 · pp. 46–69 Read article
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Design and Simulation of 4-bit Multiplier using Carry Look-Ahead Adder at Transistor Level
Abstract: Multiplication is a basic operation performed in the Arithmetic Logic Unit, Digital signal processing, Floating-point unit and Application specific integrated circuits. This paper deals with the design and simulation of the 4-bit multiplier using a carry look-ahead adder at the transistor level. The total design process involves hierarchical implementation. Where the basic gate operations like AND, OR, NOT, and XOR are repeatedly used for designing the entire circuit. So, the …
Published in Journal of VLSI Design Tools and Technology · Vol. 11, Issue 3, 2021 · pp. 10–18 Read article