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4 articles for “Spartan 6 FPGA”
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Hardware/Software Co-Simulation of Gradient-based Edge Detectors: A Comparative Study
Abstract: Edge detection, a segmentation technique, produces an edge map that contains important information about the image. We realized Gradient-based Edge Detection Algorithms in FPGA hardware utilizing Hardware-Software Co-Simulation with the help of Simulink (Mathworks) and System Generator (Xilinx). We explored and utilized different gradient based edge detection operators Sobel-Fieldman, Robert and Prewitt Operator. After comparative analysis, we found both Sobel and Robert operators among the best with hardware realization of …
Published in Journal of Image Processing & Pattern Recognition Progress · Vol. 2, Issue 3, 2015 · pp. 30–37 Read article
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Hardware Optimization of FPGA for I2C Master Protocol and Interfacing with EEPROM Slave
Abstract: This paper focuses on I2C (Inter Integrated Circuit) protocol master controller. I2C protocol was originally given by Philips semiconductors so that faster devices can communicate with slower devices and also allow devices to communicate with each other over serial bus without data loss. The I2C controller provides support for a communication link between integrated circuits and memory units on a board. I2C is a bidirectional serial bus which contains two …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 2, 2015 · pp. 42–48 Read article
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FPGA Implementation of Variable Step Size Adaptive Filters for Signal De-noising
Abstract: This paper presents the design and implementation of a variable step size 40 order adaptive filter for de-noising acoustic signals. Four different adaptive filters (LMS, Sign-Data, Sign-Error and Sign-Sign) were designed using three different structures, viz., direct form, transposed and the proposed structure and their de-nosing performance was compared. Further, the filters were implemented on three different Field programmable gate arrays (FPGAs), viz., Spartan 6, Virtex 6 and Viretx 7 …
Published in Journal of Semiconductor Devices and Circuits · Vol. 1, Issue 3, 2014 · pp. 7–19 Read article
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Design of FPGA Based ALU Using Reversible Logic Gates
Abstract: Reversible or information misfortune less circuits has applications in computerized signal handling, correspondence, PC design and nanotechnology. Reversible technique is utilized to minimize heat that happens in traditional circuits by keeping the loss of data. This paper proposes a reversible configuration of an ALU. This ALU comprises of eight operations, five are of arithmetic category and three are from logical category operations. An arithmetic operations incorporate add, sub, increase by …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 3, 2016 · pp. 15–21 Read article