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6 articles for “Digital Signal Processing (DSP)”
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MAC Unit Implementation on FPGA
Abstract: Multiply–accumulate (MAC) computations account for a large part of machine learning accelerator operations. The pipelined structure is usually adopted to improve the performance by reducing the length of critical paths. An increase in the number of flip-flops due to pipelining, however, generally results in significant area and power increase. Using this method, we create and build a cutset-free feedforward MAC architecture that maximizes data propagation and removes superfluous pipeline registers. …
Published in Journal of Microcontroller Engineering and Applications · Vol. 13, Issue 1, 2026 · pp. 29–37 Read article
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From Noise to Insight: An Academic Study of Electrical Signal Processing
Abstract: Electrical signal processing is very important for turning raw, often noisy data into useful and actionable information. This article gives a simple and easy-to-understand summary of the basic ideas and methods used in electrical signal processing, such as filtering, signal representation, modulation, and spectrum analysis. The focus is on how to effectively eliminate noise and interference to improve the quality and dependability of signals. The conversation connects ideas from theory …
Published in Current Trends in Signal Processing · Vol. 16, Issue 1, 2026 Read article
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Performance Comparison of Noise-Tolerant, High- Performance CMOS Domino Logic Configurations
Abstract: In high-performance VLSI chip design, domino logic configuration is often preferred over static logic due to its faster operation and smaller area footprint, especially in deep submicron (DSM) technology. However, DSM noise has become a significant challenge in domino-based circuits, leading to compromises in the reliability and signal integrity of integrated circuits (ICs). The switching threshold of domino logic, defined as the input voltage level at which the gate output …
Published in Journal of Semiconductor Devices and Circuits · Vol. 12, Issue 2, 2025 · pp. 35–50 Read article
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Design & Implementation of 16-BIT MAC Unit Using Vedic Mathematics
Abstract: Multiply and Accumulate (MAC) units are essential parts of digital systems, particularly in embedded systems, digital signal processing (DSP), and image processing. The performance of these systems is significantly impacted by how well the multiplication process works. The design and construction of a fast 16-bit MAC unit utilizing Vedic mathematics are presented in this study.The proposed design utilizes the Urdhva Tiryagbhyam sutra to perform multiplication in a parallel manner, reducing …
Published in Journal of VLSI Design Tools and Technology · Vol. 16, Issue 1, 2026 · pp. 52–58 Read article
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Graphene–Perovskite Hybrid Opto-Electronic Modulators for Ultra-Low Power Optical Communication
Abstract: This paper proposes a novel self-adaptive neuromorphic opto-electronic transceiver architecture designed to enhance the intelligence, adaptability, and efficiency of next-generation optical communication networks. The proposed system integrates neuromorphic computing principles with photonic signal processing to enable real-time learning, dynamic resource allocation, and autonomous compensation of channel impairments such as dispersion, nonlinearities, and noise. Unlike conventional transceivers, the developed model employs spiking neural networks embedded within opto-electronic circuits to mimic biological …
Published in Trends in Opto-electro & Optical Communication · Vol. 16, Issue 1, 2026 · pp. 41–52 Read article
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Design and Implementation of 256-bit Vedic Multiplier on Reconfigurable Platform
Abstract: Multiplication is a fundamental arithmetic operation in digital signal processing and embedded systems. Traditional multiplier architectures often suffer from increased latency and resource utilization when scaled to higher bit widths. Vedic Mathematics, an ancient Indian technique, offers a novel and efficient alternative. This paper presents the design and implementation of a 256-bit Vedic multiplier using the Urdhva Tiryakbhyam Sutra on a reconfigurable hardware platform, specifically FPGA. The proposed architecture decomposes …
Published in Journal of Materials & Metallurgical Engineering · Vol. 15, Issue 3, 2025 · pp. 56–65 Read article