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5 articles for “Boolean function”
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Logic Optimization Algorithm based on Shannon’s Expansion: Reduction in Area, Power and Delay for Pass Gate Implementation
Abstract: The reduction in hardware requirement for any application does not only guarantee the reduction of chip area but also significantly reduces the corresponding power consumption and delays. Hence, any heuristic used to reduce the hardware requirement for given logic is always well justified. In this paper, the number of pass gates required to implement the given Boolean Logic is reduced by sizeable amount with use of the proposed algorithm for …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 2, 2013 · pp. 24–34 Read article
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Stream Cipher Based Modified Espresso Algorithm for 5G Communication
Abstract: AbstractTo meet the requirement of 5G communication, Dubrova and Hell design Espresso, which is a stream cipher. Espresso uses 128-bit key, 96-bit initial vector (IV) and a 6-degree Boolean function as its output function. Jia-Min and Wen-Feng showed that algebraic attack is possible with time complexity being O(2(66.86)). In this paper, we present a methodology for the modification of Espresso with reformed Galois configuration of 256-bit Nonlinear Feedback Shift Registers …
Published in Journal of Computer Technology & Applications · Vol. 10, Issue 1, 2019 · pp. 32–40 Read article
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A Majority Function Based Full Subtractor
Abstract: In the present landscape of very large-scale integration (VLSI) technology, the imperative to implement Boolean functions with minimal gate count remains a cornerstone of efficient circuit design. This pursuit has only grown more critical with the evolution of low-power design strategies, which now offer significantly enhanced benefits compared to traditional approaches. The trifecta of performance, affordability, and dependability continue to drive innovation in this field, shaping the trajectory of technological …
Published in Research & Reviews : Journal of Physics · Vol. 13, Issue 2, 2024 · pp. 8–14 Read article
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The Role of Majority Functions in Enhancing Full Subtractor Performance in High-Density Logic Circuits
Abstract: In the present trend of very large-scale integration (VLSI) technology, implementing a Boolean function with the fewest number of gates (logic) has always been important. Low power design strategies now provide much more benefits than in the past. Performance, affordability, and dependability may be key issues in this area of technology design. Power dissipation is now recognized as a crucial component in the development of competitive market areas such wireless …
Published in Journal of Semiconductor Devices and Circuits · Vol. 11, Issue 2, 2024 Read article
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Area and Power Improvement with New Initial Ordering Method Combined with Sift Algorithm for BDD Mapped Circuits
Abstract: Digital circuits are the important elements in almost every electronic design. As the size of electronic ICs are shrinking rapidly, the minimization of the circuit elements and power consumption became more focused area of VLSI research. In this paper, we have introduced a new method for reduction of area and power of binary decision diagram mapped circuits. Binary decision diagrams are used to represent digital functions in VLSI CAD. It …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 2, 2018 · pp. 67–71 Read article