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190 articles for “VLS”
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Design and Analysis of Energy-Efficient GDI Cell and Its Impact on Multipliers
Abstract: VLSI design technology suffers from three major issues such as area, speed and power. Among these issues, power is a serious concern that is yet to be considered. So, in this paper, power is concerned more as compared to area and speed. GDI (gate diffusion input) is one of the common techniques used in VLSI design systems to reduce power consumption. Due to its high performance and less area overhead, …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 2, 2014 · pp. 32–36 Read article
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Effect of Inter Shell Spacing on Performance of MWCNT Bundle at 100 µm Interconnect Length
Abstract: This paper introduces the aspects of the utilization of Multi Wall Carbon Nanotube (MWCNT) as VLSI interconnects. The equivalent impedance parameters are figured concerning inter-shell spacing for L=100 µm and examination through diagrams are demonstrated. The delay and power dissipation of MWCNT with changing inter shell spacing have additionally been mimicked for ideal driver size and ideal number of repeaters at 32 nm, 22 nm and 16 nm technology nodes, …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 3, 2015 · pp. 71–79 Read article
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Short Review on Fluid Mechanics with the Domain of Nanotechnology for Applications in Nuclear-Reactors
Abstract: In this work, a brief review on microfluidic flow is provided. Also, the brief ideas on very large scale integration (VLSI) circuits are provided. A single polymethylmethacrylate (PMMA) based gradual expansion microchannel is fabricated by the maskless lithography, hot embossing lithography and direct bonding technique. Surface-driven microfluidic flow of dyed water is recorded in the fabricated device using a CMOS camera catching 25 frames per second with a corresponding time-scale …
Published in Nano Trends – A Journal of Nano Technology & Its Applications · Vol. 23, Issue 2, 2021 · pp. 45–50 Read article
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Implementation of Adders Using Ternary Based Multiple Valued Logic
Abstract: In today’s world VLSI chips are widely used in various branches of Engineering like Voice and Data communication networks, Digital signal processing, Computers, Commercial Electronics, Automobiles, Medicine and many more. So, there have been major advances in IC technology which have both made feasible and generated great interest in electronic circuits which employ more than two discrete levels of signals such circuits called Multiple valued logic circuits, offer several potential …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 2, 2023 · pp. 1–8 Read article
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Advancing IoT Connectivity through Very Large-Scale Integration of Semiconductor Technology
Abstract: The term "integrated circuit" as it is currently used typically refers to a monolithic IC, which is significantly different from an HIC in that the former is created by joining several components on a substrate, while the latter is created in a sequence of steps using a single wafer that is subsequently divided into chips. Hybrid chips are perfect for complicated applications in sectors like artificial intelligence (AI), the Internet …
Published in Journal of Semiconductor Devices and Circuits · Vol. 11, Issue 3, 2024 · pp. 54–63 Read article
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Design & Implementation of 16-BIT MAC Unit Using Vedic Mathematics
Abstract: Multiply and Accumulate (MAC) units are essential parts of digital systems, particularly in embedded systems, digital signal processing (DSP), and image processing. The performance of these systems is significantly impacted by how well the multiplication process works. The design and construction of a fast 16-bit MAC unit utilizing Vedic mathematics are presented in this study.The proposed design utilizes the Urdhva Tiryagbhyam sutra to perform multiplication in a parallel manner, reducing …
Published in Journal of VLSI Design Tools and Technology · Vol. 16, Issue 1, 2026 · pp. 52–58 Read article
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Efficient AES for Biometric Image Signal Processing
Abstract: Abstract: Several computation schemes and architectural designs have been suggested during the last three decades for efficient hardware implementation of biometric applications. The biometric application of advanced encryption standard (AES) algorithm in high texture image signal processing. The proposed AES very large-scale Integration (VLSI) architecture has 16 % and 15 % less dynamic power consumption and LUT utilization then available best design available AES architecture in the presented literature survey. …
Published in Current Trends in Signal Processing · Vol. 9, Issue 1, 2019 · pp. 7–9 Read article
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Implementation of FIR Filter with Reverse Converter based RNS Kogge–Stone Adder
Abstract: AbstractLow power very large scale integration (VLSI) circuits are pertinent for designing of steep overall performance and adjustable devices. In current technology VLSI plays a vital role to reduce power consumption and delay. In analog to digital converter process, adder plays a crucial role. The authority of nonviolent issue is increasing regularly because of changing that a way, packaging and cooling cost, transportable route of motion and reliability. This freebie …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 2, 2018 · pp. 34–43 Read article
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An Efficient RNS Based Sparse Kogge Stone Parallel Pre-fix Adder with Filter
Abstract: AbstractLow power very large-scale integration (VLSI) circuits are important for designing of high performance and portable devices. Along with that the high speed, small area and low cost are also the main considerations of VLSI circuits. The importance of low power is increasing day by day because of changing trend, packaging and cooling cost, portable system and reliability. This paper presents the design of Digital FIR filter using reverse converter …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 1, 2018 · pp. 43–51 Read article
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Numerical Simulation and Modeling of Self Heating in SOI MOSFET
Abstract: Abstract As the device size has been reduced the temperature increment of high-performance very large scale integrations (VLSIs) becomes a major issue. The self-heating effect and non-uniform power distribution in VLSIs, affect the performance of device. In this paper numerical simulation of self heating in SOI MOSFET has been performed. Poisson's equation, continuity equation, energy balance equation and heat flow equations have been solved self consistently using finite element method …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 3, 2018 · pp. 18–23 Read article
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High Speed and Low Power Basic Digital Logic Gates, Half-Adder and Full-Adder Using Modified Gate Diffusion Input Technology
Abstract: In this paper, modified gate diffusion input (MGDI) technology has been used for the design and implementation of digital integrated circuits (ICs). In today’s digital world, IC plays a vital role in high-performance computing, communication, and many consumer electronics. IC manufacturing technology has scaled down to smaller device dimensions. This scaling has a great impact on the design of digital ICs. The main objective of the IC manufacturing technology is …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 1, 2018 · pp. 34–42 Read article
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Area and Power Improvement with New Initial Ordering Method Combined with Sift Algorithm for BDD Mapped Circuits
Abstract: Digital circuits are the important elements in almost every electronic design. As the size of electronic ICs are shrinking rapidly, the minimization of the circuit elements and power consumption became more focused area of VLSI research. In this paper, we have introduced a new method for reduction of area and power of binary decision diagram mapped circuits. Binary decision diagrams are used to represent digital functions in VLSI CAD. It …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 2, 2018 · pp. 67–71 Read article
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Implementation of Different Low Power Techniques on CMOS Inverter and NAND Circuits
Abstract: The growth in technology has increased the usage of additional components on a single chip. This increased number of components on a single chip increases the significant amount of power dissipation and this causes the major challenge for the today’s circuit designers. There are several techniques in VLSI field which help to reduce power dissipations. This paper has analytical analysis of different low power techniques on CMOS inverter and NAND …
Published in Journal of VLSI Design Tools and Technology · Vol. 9, Issue 1, 2019 · pp. 38–43 Read article
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Hybrid CMOS-SET Inverter Design for Improved Performance using Tied Body-backgate Technique
Abstract: Single-electron transistors (SETs) are an attractive candidate for future functional elements in LSIs, because of their low-power consumption and small size. Integration of current CMOS technology with the emerging SET devices is an effective approach for improving density of integration in VLSI chips and ensuring ultra low power dissipation along with the advantages of CMOS technology like high gain, current drive, speed and matured fabrication technology. This paper investigates hybrid …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 1, 2015 · pp. 24–29 Read article
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Comparative Study of (Operational Transconductance Amplifier) OTA to Design Low Pass Filter
Abstract: Basic building block to design an analog circuit is amplifier and it is used for such applications like analog to digital and digital to analog converter, sensor network and many more. Amplifier with lofty gain and high bandwidth will increase the efficiency of design. Present time is talking about development of VLSI technology and everything is related to size of transistor and decreasing power supply in a circuit. Operational transconductance …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 2, 2015 · pp. 11–15 Read article
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Design of Energy Efficient Clock System
Abstract: Energy efficiency is a key metric for energy constrained Ultra Low Power (ULP) VLSI applications such as wireless sensor nodes, pace makers, hearing aids etc. These applications need clock system in their signal processing and communication sub-system. Moreover, clock system plays a vital role in governing the reliability, power consumption and performance of synchronous system. In today’s era of portable electronics, power consumption has emerged as a forefront design metrics. …
Published in Journal of VLSI Design Tools and Technology · Vol. 9, Issue 2, 2019 · pp. 1–7 Read article
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A Novel Design for Power Reduction in Arithmetic Circuits using MTCMOS Technology
Abstract: In CMOS logic circuits, the reduction in the threshold voltage due to voltage scaling leads to increase in the subthreshold leakage current and hence static power dissipation. Although power consumption is important for modern VLSI design, operation speed and occupied area are still the main requirements of the VLSI design. Multi threshold voltage CMOS (MTCMOS) technology is a good solution which provides a high performance and low-power design without any …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 1, 2014 · pp. 1–7 Read article
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Methodology of Standard Cell Library Design in .LIB Format
Abstract: The importance of standard cell library design methodology is growing with very-large-scale integration (VLSI) technology advancement due to its usage in VLSI EDA synthesis flows. In this paper, to best of our knowledge and information in any published literature no systematic method of standard cell and creating appropriate co-laterals. In this paper the standard cell design methodology, layout topology, methodology for creating characterized timing table has been developed using 250 …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 1, 2014 · pp. 30–38 Read article
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Cluster Based Sleep Transistor Approach for Low Power 6T SRAM Cell
Abstract: The demand of high density VLSI circuits has been increasing as the size of ICs is becoming small day by day. It has been seen that, to reduce active power dissipation in memory, the supply voltage reduction is necessary. Lowering the supply voltage is one of the most straightforward and effective ways to suppress the energy consumption because reducing the supply voltage could reduce the dynamic power and leakage power …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 1, 2016 · pp. 41–48 Read article
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Coarse Grain to Mixed Grain Parallel Computing
Abstract: Parallel computing interests are growing again as a result of multicore processors. History of parallel computing dates back to early 1970’s when supercomputers supported high performance computing demand for scientific applications. Today, highly dense Very Large Scale Integration (VLSI) chips have opened up new opportunities and challenges for parallel computing. In this article, we provide a short synopsis of an evolutionary path of parallel computing from both hardware granularity and …
Published in Recent Trends in Parallel Computing · Vol. 1, Issue 2, 2014 · pp. 1–10 Read article