PTS
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Design and Implementation of High-Speed Low Power Low Area Hybrid One Bit Full Adder Using CMOS Technology
Abstract: In this article, we'll take a look at a new kind of Full Adder (FA) design that mixes traditional Complementary Metal Oxide Semiconductors (CCMOS) with Pass Transistors (PTs) and Transmission Gates (TGs). To analyze the circuit's performance, we used the Mentor Graphics software package. Since all twenty (20) varieties of Full Adder circuits were able to be measured and compared, this research was conducted. When the clock rate of the …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 2, 2023 · pp. 29–39 Read article
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Mitigation of Peak to Average Power Ratio in Orthogonal Frequency Division Multiplexing through SOP-PTS
Abstract: Orthogonal Frequency Division Multiplexing (OFDM) is a popular multicarrier modulation technology extensively employed in 4G wireless communication systems to transmit data over a dispersive channel. To address the Peak-to-Average Power Ratio (PAPR) issue in OFDM, a technique called Partial Transmit Sequence (PTS) is commonly utilized. The PTS method involves dividing the data block into non-overlapping sub-blocks and then combining them using phase factors to mitigate PAPR. However, the conventional PTS …
Published in International Journal of Radio Frequency Innovations · Vol. 1, Issue 1, 2023 · pp. 32–39 Read article