Adiabatic Logic
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Design and Implementation of Carry Select Adder based On Wallace tree Multiplier using Adiabatic Logic
Abstract: The Wallace tree multiplier construction using a carry select adder (CSA) and this paper discusses adiabaticlogic. The proposed design aims to reduce power consumption while maintaining high performance.Adiabatic logic is employed to reduce power dissipation by recycling energy during the logic transitions. TheWallace tree multiplier is used to perform fast multiplication of two large numbers by breaking down themultiplication process into smaller sub-tasks. The CSA is used as the adder …
Published in Journal of VLSI Design Tools and Technology · Vol. 13, Issue 2, 2023 · pp. 21–31 Read article
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Exploring the Potential of Adiabatic Logic for Low Power Nano-scale VLSI Designs
Abstract: Low power dissipation has emerged as one of the main research areas due to the ongoing scaling down of device technology in the area of VLSI circuit design. Adiabatic logic gates are a practical answer to the rising demand for low power portable gadgets. Various adiabatic logic families, including 2N-2N2P, PFAL (Positive Feedback Adiabatic Logic), DCPAL (Differential Cascode and Pre-resolved Adiabatic Logic), and a suggested circuit centred on the PFAL …
Published in Journal of VLSI Design Tools and Technology · Vol. 13, Issue 1, 2023 · pp. 6–14 Read article
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A Survey on the various Adibatic Logic Styles used for Circuit Design in IOT & WSN Applications
Abstract: Abstract— This paper describes about different adiabatic logics are used which are all used to provide low power and high speed. Low power circuits and designs are the need of the hour as they find applications in electronic components which have power efficient processing capabilities. For IOT based applications we need to design low power VLSI circuits that utilize adiabatic logic in order to enhance the security and reduce the …
Published in Journal of Microcontroller Engineering and Applications · Vol. 9, Issue 2, 2022 · pp. 1–5 Read article