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6 articles for “SRAM”
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Delay Analysis of HS-14T 45nm CMOS SRAM with Different SRAM Techniques for Improvement in Speed
Abstract: This paper presents a novel HS-14T design aimed at significantly improving read and write delays compared to conventional 6T and other memory cells RHRD-12T, SEUH-12T, and NHRC-14T. As technology scales, the demand for faster and more stable memory cells becomes increasingly critical. Our proposed HS-14T incorporates additional transistors to enhance stability and reduce access times, resulting in notable performance gains. Comprehensive simulations reveal that the HS-14T SRAM cell substantially reduces …
Published in Journal of VLSI Design Tools and Technology · Vol. 14, Issue 2, 2024 · pp. 1–13 Read article
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Development of Polymer Based SRAM Cell with Enhance Low Power Performance
Abstract: Low-power memory technologies are in high demand with the rapid growth of portable electronics and energy-efficient computing systems. Static random-access memory (SRAM) plays a crucial role in processors, cache memories, and system-on-chip applications due to their speed and reliability. Static Random Access Memory (SRAM) is typically implemented using complementary MOS (CMOS) technology, which integrates both PMOS (P-channel Metal–Oxide–Semiconductor) and NMOS (N-channel Metal–Oxide–Semiconductor) transistors. However, as technology scales to deep submicron …
Published in Journal of Polymer & Composites · Vol. 14, Issue 1, 2026 · pp. 1439–1448 Read article
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Performance and Analysis of 6T, 8T & 10T SRAM Cell in 28nm Technology
Abstract: Technology scaling into deep sub-micron regimes has significantly increased the design challenges of Static Random Access Memory (SRAM), particularly at the 28 nm technology node. As transistor dimensions shrink, SRAM cells become more vulnerable to stability degradation, leakage current, process variations, and reduced noise margins, which adversely affect overall memory performance and reliability. The conventional 6T SRAM cell remains widely used due to its compact structure and high storage density; …
Published in Journal of VLSI Design Tools and Technology · Vol. 16, Issue 2, 2026 Read article
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Implementation of STATIC-RANDOM-ACCESS-MEMORY-Based In-Memory Computing-architecture for improving Energy Efficiency
Abstract: The in-memory-computing architecture the improvement of big data and high-performance computing. In memory-computing (IMC) as reduces the latency and power consumption of data processing. Proposed research paper static random-access memory-based IMC architecture. By completing internal write-back, NMOS transistors increase computational efficiency and eliminate the need to read the computational output right away. A 128×128 STATIC-RANDOM-ACCESS-MEMORY-IMC macro chip is designed using the 78-nm technology. The energy efficiency of 55.3TOPS/W with supply …
Published in Journal of VLSI Design Tools and Technology · Vol. 15, Issue 1, 2025 · pp. 25–35 Read article
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Power Estimation Approach for Artix 7 FPGA using Machine Learning Technique
Abstract: This paper presents the power estimation approach using a suitable machine learning technique. Artix7 FPGA has been chosen as the target FPGA (Field Programmable Gate Arrays) platform for understanding the methodology of power estimation. There are various approaches of power estimation for FPGAs that have been given in the literature viz. probabilistic, statistical, and LUT- based, etc. In the past few years, the demand for hand-handled devices like smartphones, tabs, …
Published in Research & Reviews: A Journal of Embedded System & Applications Read article
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A High Frequency and Power Efficient Memristor Emulator and Its Application
Abstract: This study presents a small, energy-efficient memristor emulator made for use at high frequencies. The proposed circuit has a simple design that only includes three n-type MOSFETs and a grounded capacitor. This means that there is no need for active components or DC biasing. This streamlined architecture not only makes things easier, but it also uses very little power, with dynamic and static power measured at 15.82 μW and 65.6 …
Published in International Journal of Electrical and Communication Engineering Technology · Vol. 3, Issue 2, 2025 · pp. 45–52 Read article