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6 articles for “PTL”
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Hardware and Power Efficient Single Bit Full Adder Using GDI and PTL Technique
Abstract: Abstract: This study presents hardware and power efficient single bit full adder which consists of two techniques, Pass Transistor Logic (PTL) and Gate Diffusion Technique (GDI). Several logic families are described by PTL which is utilized in the architecture of integrated circuits. PTL technique is used to decrease the number of transistors in the circuits to make different logic gates. GDI technique is utilized for the low power consumption. CADENCE …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 7, Issue 3, 2019 · pp. 9–17 Read article
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Design and Implementation of Low Power Priority Encoder
Abstract: Nowadays, low-power devices are widely used in VLSI design technology because they can reduce power consumption and power dissipation. To achieve this, various low-power techniques are utilized to minimize device power losses. This project focuses on analyzing the performance of priority encoders in different low-power technologies for Flash Type ADC. Moreover, the power consumption of these technologies is compared with the conventional CMOS design. Each of these techniques offers distinct …
Published in Journal of Microcontroller Engineering and Applications · Vol. 10, Issue 2, 2023 · pp. 1–14 Read article
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Low Power Area Efficient 4×4 Vedic Multiplier using GDI half adders with Better Delay Performance
Abstract: In the field of VLSI, wireless communication and digital signal processing, low power and area efficient architectures are considered. Majority of such applications uses multiplication. The multiplication is done using repetitive addition and shift and add method. It consumes more area delay and power. Vedic multiplier is one of the efficient multiplier. It is designed using different Vedic techniques or sutras, which reduces the area, power consumption and provide better …
Published in Journal of Control & Instrumentation · Vol. 10, Issue 2, 2019 · pp. 28–39 Read article
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High Speed and Low Power Basic Digital Logic Gates, Half-Adder and Full-Adder Using Modified Gate Diffusion Input Technology
Abstract: In this paper, modified gate diffusion input (MGDI) technology has been used for the design and implementation of digital integrated circuits (ICs). In today’s digital world, IC plays a vital role in high-performance computing, communication, and many consumer electronics. IC manufacturing technology has scaled down to smaller device dimensions. This scaling has a great impact on the design of digital ICs. The main objective of the IC manufacturing technology is …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 1, 2018 · pp. 34–42 Read article
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Investigation of Pass Transistor Logic and CMOS Logic Configuration Based D-Multiplexers
Abstract: Pass Transistor Logic (PTL) arrangement depicts a few rationale families utilized in the plan of incorporated circuits. It lessens the include of transistors utilized making distinctive rationale entryways, by killing excess transistors. The pass transistor is driven by an intermittent clock flag and goes about as an entrance change to ON (1) or OFF (0), contingent upon the information flag. The utilization of pass transistor rationale has brought about noteworthy …
Published in Journal of Microelectronics and Solid State Devices · Vol. 9, Issue 2, 2022 · pp. 1–8 Read article
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Low-power, High-speed, Full-swing Hybrid Full Adder
Abstract: Abstract: Nowadays VLSI design demands low area and low-power consumption. In this study, a low-power, high-speed, full-swing 1-bit hybrid full adder is proposed. The hybrid full adder is decomposed into three sub-modules. For each sub-module, designs are different. Module 1 and 2 are designed using pass transistor logic (PTL) and Module 3 uses transmission gates to produce carry signal. Then by proposed low-power, high-speed hybrid full adder circuits play a …
Published in Research & Reviews: A Journal of Embedded System & Applications · Vol. 7, Issue 3, 2019 · pp. 22–29 Read article