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4 articles for “BSI”
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Design and Implementation of Low Noise Power Low and High Speed Three Stage Comparator Using 16nm Technology
Abstract: To meet the demands of quicker operation and reduced noise levels, this study proposes a new CMOS Three-based comparator version. Efficiency may be significantly improved by comparing the suggested model to existing ones. This is so because the suggested comparator would improve the efficiency of the current amplifier design. The suggested model drives the input pairs of the regenerator and the amplified stage, making for a quicker comparator. The structure …
Published in International Journal of VLSI Circuit Design & Technology · Vol. 1, Issue 2, 2023 · pp. 10–16 Read article
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Custom Back-Side Illuminated Frame Transfer Charge Coupled Device (CCD): Chip Design and Electro-Optical Characterization
Abstract: This paper provides a comprehensive overview of the chip design and electro-optical characterization of a Charge Coupled Device (CCD). While CCD technology is well-established, there are limited research articles that offer holistic perspective of CCD chip development, covering aspects ranging from device architecture and chip layout design to characterization and optimization of electro-optical parameters. In this paper, we present CCD chip design and characterization of a custom 1200 x 256 …
Published in Journal of Semiconductor Devices and Circuits · Vol. 12, Issue 3, 2025 · pp. 39–55 Read article
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Physics of Semiconductors and Electronic Circuits
Abstract: This study talks about the basic ideas behind semiconductor physics and how important they are for making and running modern electronic circuits. It starts with a look at intrinsic and extrinsic semiconductors, going into how charge carriers move, energy band theory, and how doping affects how well the electricity flows. Next, the conversation turns to semiconductor devices like diodes, bipolar junction transistors (BJTs), and field-effect transistors (FETs). The focus is …
Published in Journal of Semiconductor Devices and Circuits · Vol. 12, Issue 2, 2025 · pp. 9–17 Read article
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Performance Comparison of Noise-Tolerant, High- Performance CMOS Domino Logic Configurations
Abstract: In high-performance VLSI chip design, domino logic configuration is often preferred over static logic due to its faster operation and smaller area footprint, especially in deep submicron (DSM) technology. However, DSM noise has become a significant challenge in domino-based circuits, leading to compromises in the reliability and signal integrity of integrated circuits (ICs). The switching threshold of domino logic, defined as the input voltage level at which the gate output …
Published in Journal of Semiconductor Devices and Circuits · Vol. 12, Issue 2, 2025 · pp. 35–50 Read article