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6 articles for “AMBA AHB”
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Reusable Verification Framework of AMBA AHB-Lite Protocol using HDVL and UVM
Abstract: Huge complexity of chip increased in the past recent years and integration of more number of transistors on a single SoC makes verification of any SoC based design very critical. About 75–80% of the total design cycle time is spent in functional verification. To reduce this time and effort, hardware verification languages came into picture. The most popularly used HVL is system verilog, which is based on object oriented programming …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 2, 2016 · pp. 62–73 Read article
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Functional Verification of AMBA AHB-Lite using Layered Testbench Technology of System Verilog
Abstract: Huge complexity of chip increased in the past recent years and integration of more number of transistors on a single system on chip (SoC) makes verification of any SoC based design very critical. Ever increasing complexity and size of designs lead to a number of verification challenges, which are the productivity, efficiency, reusability and completeness. About 75–80 % of the total design cycle time is spent in functional verification. To …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 2, 2016 · pp. 104–112 Read article
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AMBA 3 AHB Lite Protocol design and verification
Abstract: As technology progresses, the amount of logic and transistors that can be packed on a device that runs an extreme integrated SoC design grows. The most significant feature of a SoC is its connectivity. In most SoCs, the AMBA (Advanced Microcontroller Bus Design) bus is the most often used on-chip bus design.AMBA was first introduced by ARM. The AMBA AHB-Lite synthesizable design meets the requirements of high-performance synthesizable designs. Because …
Published in Journal of Semiconductor Devices and Circuits · Vol. 8, Issue 3, 2021 · pp. 47–55 Read article
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Implementation of Register Access Methods for Device Configuration Using UVM
Abstract: Verification of hardware registers conjointly with their monitoring forms a huge part of any verification project. Verification using universal verification methodology (UVM) register layer enables reusability, which consequently eliminates the dependency of register layer on protocol thereby saving time by evading efforts of rewriting register sequences once the protocol changes. This paper constructs the advanced high performance bus (AHB) register verification environment to ease design configuration, thereby promoting reusability and …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 3, 2015 · pp. 132–138 Read article
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Design and RTL Implementation for AHB-APB Bridge on SoC
Abstract: The focus of this research is to design and implement an interconnection protocol with 32-bit read/write data which operates on AMBA AHB-APB bridge. With the advent of scaling technology, embedded system focuses more on low-power dissipation and SoCs. Hence processors and routing protocols which focus on low-power design by ARM have gained popularity. In high-speed communication modules, the protocol works efficiently but has limitations with device operating at low speed. …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 2, 2016 · pp. 44–52 Read article
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Recent Trends and Techniques in the Advanced Microcontroller Bus Architecture (AMBA) Protocol: A Comprehensive Review
Abstract: ARM has created the Advanced Microcontroller Bus Architecture (AMBA) that is used as the main method for communication on chips in today’s embedded systems. Since AMBA is built to scale and combine with other components, it allows data transfer to high-performance and low-power components easily. The paper discusses how AMBA protocols have evolved and presents new trends of producing higher data rates, conserving energy, and lowering latency. This study offers …
Published in Recent Trends in Electronics Communication Systems · Vol. 12, Issue 3, 2025 · pp. 9–15 Read article