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1976 articles for “land use/land cover (LU/LC)” (ranking capped at the first 2,000 matches — narrow the search to see the rest)
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Video Telephony using Cable TV Distribution Network
Abstract: This paper focuses to implement video telephony using cable TV distribution network. We had used coaxial cable which is main part of cable TV network and it provides efficient bandwidth for video telephony. The major design issue to implement full-duplex communication channel for audio-video information and establish switching control section for routing the signal to the destination. We had chosen coaxial cable for communication link because it is already established …
Published in Journal of Telecommunication, Switching Systems and Networks · Vol. 3, Issue 1, 2016 · pp. 1–7 Read article
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Call Quality Measurement and Application in Telecommunication Network
Abstract: The measurement of call quality from end-users’ perspective is emerging area of research on speech quality in telecommunication networks. The research is focused on deriving the call quality parameters from end-users’ perspective; and visualize and escalate the critical call quality. Also proses the method of redemption of call charges based on call quality parameters perceived. The research proposed and developed measures, for certain call parameters during the call and provide …
Published in Journal of Telecommunication, Switching Systems and Networks · Vol. 3, Issue 1, 2016 · pp. 8–19 Read article
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Generation of Sum and Difference Patterns of Linear Arrays Using Thinning
Abstract: Literatures are available on linear arrays with equal and unequal spacing. In this paper, the radiation patterns of linear arrays are numerically simulated using thinning. Thinning is a method by which the total number of active elements in a linear antenna array is reduced without causing major degradation in system performance. The present work is found to be useful in cost reduction while meeting some of the desired radiation characteristics …
Published in Journal of Telecommunication, Switching Systems and Networks · Vol. 2, Issue 2, 2015 · pp. 21–24 Read article
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Wind Forecasting Using Various Neural Networks in Machine Learning
Abstract: Wind Power Forecasting, as the name applies is a process in which data of past is used to tell what kind of output can be expected from a wind turbine in the foreseeable future. Machine learning, can be said to be a derivation of artificial intelligence that makes it possible for the system to learn automatically and improve upon itself from faults, without needing to tell the system to do …
Published in Journal of Telecommunication, Switching Systems and Networks · Vol. 8, Issue 2, 2021 · pp. 32–43 Read article
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Low-Offset High Speed CMOS Voltage Comparator using 180 nm Technology
Abstract: A low Off-Set high-speed two-stage dynamic comparator is presented. In this circuit, PMOS transistors are used at the input of the first and second stages of the comparator. At the evaluation phase, the second stage is activated after the first stage with a predetermined delay to achieve a controllable pre-amplifier gain. Also, the first stage is turned off after the delay to reduce overall power consumption. Simulation results in 0.18µm …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 21–27 Read article
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Comparative Analysis of Combinational Circuit Using Reversible Logic Based Techniques
Abstract: In the last few decades, due to the ever growing demand for portable and small sized devices, integrated circuits require electronic circuit design methods to implement integrated circuits with low power consumption. The ever-growing number of transistors integrated on a chip and the increasing transistor switching speed in recent decades has enabled great performance improvement in computer systems by several orders of magnitude. Adiabatic logic technique is one of the …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 1, 2018 · pp. 30–33 Read article
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Efficient Analysis and Minimization of Glitches using Threshold Swapped Combinational Clock Gating
Abstract: Nowadays design of electronic circuits to meet requirements like high speed, better functionality and low power is a tedious task. Power dissipation in any circuit comprises mainly two components: static power and dynamic power. The dynamic power heavily depends on the switching activity of the circuit. During the transistor switching transitions some spikes may occur, which are called as glitches. These glitches contribute 20–70% of the dynamic power and 20% …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 2, 2015 · pp. 29–37 Read article
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Memristor Modelling for Common Source Amplifier Using 180 nm Technology
Abstract: The objective of this research paper is on memristor modeling for common source amplifier circuit using cadence virtuoso tool at gpdk 180 nm technology. A memristor is the fourth element count after resistor, inductor and capacitor in fundamental electrical circuits assumption is proposed by Leon Chua, its characteristics is based on already occurred principles of voltages (V), current (I), flux (ᵩ) and charge (q). Ohm’s law states relation voltage to …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 3, 2015 · pp. 45–54 Read article
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A High Performance Reference Circuit with Optimized Input Offset Operational Amplifier using Device Mismatch Model
Abstract: In this paper, author describes a band gap reference (BGR) circuit, having reference voltage 1.20V with maximum temperature coefficient of 63 ppm/0C in temperature range of –40 to 120 0C. The circuit operates in range of supply voltage, 3.0V to 3.6V. An operational amplifier (op-amp), whose input offset voltage is reduced upto 892 µV using Pelgrom’s device mismatch model is used in BGR. The power supply rejection ratio of circuit …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 1, 2013 · pp. 1–7 Read article
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Design of Grounded Immittance Simulator using Single CDBA
Abstract: This paper proposes a grounded parallel immittance simulator using single current differencing buffered amplifier (CDBA). The proposed circuit realizes both parallel with R from the same topology. The properties and applications of the proposed circuit are verified using PSPICE simulation.
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 3, 2013 Read article
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Design and Analysis of Source Current Effect on Preamplifier-Positive Feedback-based CMOS Comparator Using 90 nm Technology
Abstract: One of the most important and essential components of the data converter circuit is the comparator and this paper presents the implementation and characterization of the basic and simplest CMOS comparator in 90 nm technology. Once the technology scales down, the design and implementation becomes an essential issue at sub-micron and deep-sub-micron technology. The behavior of the threshold voltage in the CMOS is not a linear quantity when the parameters …
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 3, 2013 Read article
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Low Power 8-Bit Square Root Carry Select Adder Constructed By Using 8 Transistor Full Adder
Abstract: Carry select adder is the high speed adder which is designed to speed up arithmetic operations and to reduce the computation time. Carry select adder is used to perform fast arithmetic functions in data processing processors. Low power consumption, reduced area, reduced delay and increased speed are the most important features of the modern electronic system design. In this proposed work, 8 transistor full adder (8T full adder) is used …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 1, 2014 · pp. 25–29 Read article
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A Review for Power Optimization in MOS Devices using Different Logic Styles
Abstract: This paper presents power optimization in MOS devices by using different logic styles which is helpful for increasing high speed application. The simulation process can be done in different CMOS technologies and performance parameter of power is compared for different logic styles. Full adder and ripple carry adder are mostly used to define different logics to optimize the power. Constant logic style provides the low power and different logic style …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 1, 2016 · pp. 16–20 Read article
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VHDL Implementation of Network-on-Chip Router using Round Robin Arbiter
Abstract: As the technology progresses, a large number of devices can be incorporated into a single chip. So, the communication between these devices becomes critical. The network-on-chip (NoC) is a technology used for such communication and overcomes the constraints of traditional bus-based system-on-chip (SoC). Router is the backbone of NoC and determines the performance to a great extent. This paper focuses on the implementation of five port virtual channel router which …
Published in Journal of VLSI Design Tools and Technology · Vol. 6, Issue 3, 2016 · pp. 88–93 Read article
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Enhancement in RMPA Parameters using Slotted Rhombus Connected Square Shaped Antenna with Left Handed Metamaterial
Abstract: In this paper, rectangular microstrip patch antenna (RMPA) along with metamaterial which has design of “slotted rhombus connected with rectangular shaped cover structure” is proposed at height of 3.2 mm from the ground plane. The RMPA with proposed metamaterial structure is designed to resonate at 2.7 GHz frequency. This work is mainly focused on increasing the potential parameters of microstrip patch antenna. Proposed metamaterial design structure significantly reduces the return …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 1, 2017 · pp. 49–54 Read article
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A New Current Mode Quadrature Oscillator using Current Differencing Transconductance Amplifier (CDTA)
Abstract: This paper proposed a new current-mode quadrature oscillator using CDTA (Current Difference Transconductance Amplifier) as the active element. The proposed circuit uses only two grounded or virtually grounded capacitors, two grounded or virtually grounded resistors and two CDTAs. The functionality of the circuit is verified with the PSPICE simulation results.
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 1, 2014 · pp. 39–42 Read article
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A Novel Conflict-Free Efficient Memory-Based Real FFT Processor using UTB
Abstract: AbstractWe present “A Novel Conflict-Free Efficient Memory-Based Real Fast Fourier Transform (RFFT) using Urdhva Tiryagbhayam Butterfly”. In this paper different FFT lengths for address schemes are integrated that supports FFT processing which are used in diverse systems such as telecommunications. Address methods for various FFT lengths are coordinated in this paper to help FFT processing for different frameworks like broadcast communications. The memory bank and address can be produced by …
Published in Journal of VLSI Design Tools and Technology · Vol. 9, Issue 3, 2019 · pp. 1–11 Read article
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Adaptive Hysteresis Band Current Controller for the Shunt Active Power Filter Using the d-q0 Reference Frame Theory
Abstract: Recent wide spread applications of power electronic equipment has caused an increase of the harmonic disturbances in the power systems. The nonlinear loads draw harmonic and reactive power components of current from AC mains. Here an adaptive hysteresis band current controlled shunt active power filter is presented to eliminate harmonics and to compensate the reactive power of three-phase rectifier. This current controller changes the hysteresis bandwidth according to modulation frequency, …
Published in Journal of VLSI Design Tools and Technology · Vol. 10, Issue 2, 2020 · pp. 1–7 Read article
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A Nobel Approach of Designing A 4 Bit Carry Skip Adder Using Reversible Logic
Abstract: This paper presents a method to designing Various Adder Circuits using CMOS Logic Style for Energy-Efficient Arithmetic Applications. We present Ripple Carry Adder, Carry Bypass Adder, Carry Look Ahead Adder and Carry Skip Adder in CMOS logic styles that lead to have reduced power-delay product (PDP). We executes a comparison against each other adders which finally provide result as having a low PDP, with reference to power consumption, speed and …
Published in Journal of VLSI Design Tools and Technology · Vol. 11, Issue 2, 2021 · pp. 24–34 Read article
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DEM Development using Geographic Information System for Topographic Assessment
Abstract: Topography of the earth surface plays a vital role in the distribution of water within the natural land surfaces. This includes various hydrological processes like surface runoff, infiltration and evaporation. The quantitative assessment of these processes mainly depends upon the topography of the surfaces. Many topographic features can be computed directly from Digital Elevation Model (DEM). Assessment of topography manually is generally tedious, time consuming and often subject to error. …
Published in Journal of Water Resource Engineering and Management · Vol. 1, Issue 3, 2014 · pp. 17–23 Read article