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1927 articles for “fine/course mobile signal” (ranking capped at the first 2,000 matches — narrow the search to see the rest)
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Evaluation Algorithm for Discrimination between Fault and Power Swing Using Independent Component Analysis
Abstract: The analysis of faults and disturbances in power systems is a basic requirement for a secure and reliable electrical power supply. Independent component analysis (ICA) is an efficient computational method used to find out hidden components in a set of sampled data. The basic target of ICA is to find a linear representation and relation between nongaussian data captured during disturbance, so that the components are statistically independent, or as …
Published in Journal of Power Electronics and Power Systems · Vol. 6, Issue 3, 2016 · pp. 53–59 Read article
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Efficient Transmission Pricing using Power Flow Tracing
Abstract: The evolution of transmission pricing philosophies in deregulated power markets has introduced various techniques for efficient and accurate cost estimation of power exchanges. Earlier methods of postage stamp cost estimation failed to provide accurate cost signals. Point of Connection (POC) method is a technique through which a considerable sunk cost can be recovered but is still inefficient if applied alone. In addition to this, the POC method along with the …
Published in Journal of Power Electronics and Power Systems · Vol. 13, Issue 1, 2023 · pp. 6–15 Read article
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Parametric Optimization of TIG Welding Process in Butt Joining of AISI 310 Austenitic Stainless Steel Materials
Abstract: Tungsten inert gas (TIG) welding is an arc welding process that uses a non-consumable tungsten electrode to produce the weld. Selection of the levels of the input parameters plays a very significant role in determining the quality of a weld joint. The present study is planned to investigate effects of process parameters: welding current, gas flow rate and arc gap on ultimate tensile strength in TIG welding of austenitic stainless …
Published in Journal of Production Research & Management · Vol. 9, Issue 2, 2019 · pp. 12–19 Read article
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Operational Modeling of Cutting Parameters Influence on Power Consumption and Surface Roughness in CNC Turning of AISI 304
Abstract: This paper describes the power consumption and surface roughness predictive model development in computer numerical control (CNC) turning of AISI 304 austenitic stainless steel using Taguchi method and response surface method (RSM). The experiments are designed and conducted based on Taguchi’s design of experiments (DoE) with cutting speed, feed rate, depth of cut and nose radius as the process parameters. Signal-to-noise (S/N) ratios of responses are calculated to identify the …
Published in Journal of Production Research & Management · Vol. 3, Issue 1, 2013 · pp. 8–15 Read article
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Numerical Simulation and Parameter Analysis for Pentacene based Organic thin Film Transistor with HfO2 Gate Dielectric
Abstract: This paper explains 2D numerical simulation and Characterization of Electrical parameter of Pentacene (Organic semiconductor) based Organic thin film transistor (OTFT) devices with HfO2 as a gate dielectric and Electrical parameters including; Threshold Voltage (Vt), Mobility (µ),Ion/Ioff, and Transconductance (gm), Sub threshold slope (SS) are extracted. The numerical simulation includes model for defect density of state and field dependent mobility model.
Published in Journal of Semiconductor Devices and Circuits · Vol. 6, Issue 2, 2019 · pp. 28–34 Read article
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Complementary Metal Oxide Semiconductor Readout Integrated Circuit for Imaging Applications
Abstract: In this paper presents a novel continuous-time simultaneous-readout scheme for active imaging systems based on orthogonal modulation of photo detector signals. The superimposed-continuous-time approach presented here differs from the conventional scheduled-discrete-time scheme in that the photo detector signals are summed in a common bus concurrently and then converted to voltage levels for digitization. We illustrate that our proposed architecture may be profitable. Predominantly, in solicitations, the bandwidth necessities for a …
Published in Journal of Semiconductor Devices and Circuits · Vol. 2, Issue 2, 2015 · pp. 5–8 Read article
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A Systematic Review of IoT-based Heart Attack Detection Algorithms and Techniques
Abstract: Body temperature has an impact on heart rate, making it a crucial signal that should be watched in order to identify any abnormalities early enough to receive treatment. There is requirement for a small, portable gadget that can be used for monitoring and controlling key indicators on a daily basis. The purpose of this project is to create a device that continuously monitors vital signs while also taking temperature and …
Published in Journal of Semiconductor Devices and Circuits · Vol. 10, Issue 1, 2024 · pp. 1–7 Read article
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Energy Efficiency Issues and D2D Technique in 5G Network
Abstract: AbstractThis paper includes the survey of need and issues/challenges faced for energy efficiency in 5G network and D2D technique to improve energy efficiency without compromising the user experience. Improving the energy efficiency is important part while designing a network. Energy efficient communication is required for energy constrained networks such as ad-hoc networks in which battery powered wireless system need to reduce energy usage. Cellular systems need to be energy efficient, …
Published in Journal of Telecommunication, Switching Systems and Networks · Vol. 7, Issue 2, 2020 · pp. 1–6 Read article
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Performance Evaluation of PAPR Reduction in OFDM System
Abstract: OFDM is a bandwidth efficient multicarrier modulation which has gained a tremendous focus in recent years because of its high spectral efficiency; multipath delay spread tolerance, effectiveness against impulse noise and frequency diversity. However, some challenging issues still remain unsolved in the design of the OFDM systems. One of the major problems is high peak-to-average power ratio (PAPR) of transmitted OFDM signals. A large PAPR brings disadvantages like increased complexity …
Published in Journal of Telecommunication, Switching Systems and Networks · Vol. 3, Issue 2, 2016 · pp. 21–36 Read article
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Analysis of Cooperative Communication Techniques
Abstract: The scope of this study is to analyze cooperative communication techniques by measuring the symbol error rate vs. signal to noise ratio and analyzing the merits and demerits of those techniques. Unless stated otherwise, the channel is modelled as Rayleigh fading and noise is modeled as white Gaussian. The results of this study can be used to understand the benefits of cooperative protocols and their necessity in future communication systems. …
Published in Journal of Telecommunication, Switching Systems and Networks · Vol. 7, Issue 3, 2020 · pp. 1–9 Read article
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Design and Analysis of MAC Unit Using Single Precision Floating Point Vedic Multiplier
Abstract: Multiplication and accumulation are the basic operations which are important in several microprocessors and digital signal processing (DSP) applications to execute dedicated algorithms. Developing high speed MAC is essential for real time DSP application. The MAC unit determines the speed of the overall system and it lies in the critical path. As the demand for high speed design is continuously increasing, the studies related to the field of multipliers and …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 3, 2018 · pp. 28–35 Read article
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Implementation of DCC technique using differential amplifier based filter in 90nm CMOS technology
Abstract: Analog technique with feedback loop is applied to correct the duty cycle of any circuit without using more power. Pulse width modification is used to vary the duty cycle of clock signal. PMC cell is designed for expansion and contraction of pulse width. Differential amplifier based filter is used to detect the duty cycle of the particular clock signal. Differential amplifier and OpAmp are used to achieve adequate gain. The …
Published in Journal of VLSI Design Tools and Technology · Vol. 9, Issue 2, 2019 · pp. 13–22 Read article
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Design and Implementation of an Efficient Ternary Control Unit
Abstract: Multi-valued logic (MVL) is emerging as a thrust area of research due to several advantages offered by them over the conventional binary logic. Ternary logic is a promising alternative to the binary logic design technique thereby attracting a wide community of researchers to contribute in the design of ternary processor. The control unit is effectively the nerve center of a processor that plays a vital role in generating the appropriate …
Published in Journal of VLSI Design Tools and Technology · Vol. 5, Issue 3, 2015 · pp. 55–70 Read article
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Reducing Crosstalk in Arithmetic and Logic Unit Part of a Processor
Abstract: Crosstalk is common in any digital systems and may occur due to coupling of signals which eventually have an impact on the working of a system. In this paper, an attempt is made to study the effect of crosstalk in 8-bit slice ALU, designed using 120 nm technology and suggested a method to reduce the crosstalk.Keywords: ALU, signal integrity, metal layers
Published in Journal of VLSI Design Tools and Technology · Vol. 3, Issue 1, 2013 · pp. 28–32 Read article
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A Novel Current-Mode Quaternary Multiplier with Indian Vedic Architecture
Abstract: A multiplier is a fundamental block of any digital signal processing system. Urdhva Tiryakbhyam sutra, from ancient Indian Vedic mathematics, offers regular and hierarchical multiplier architecture. Alternatively, current-mode multi-valued logic results in reduced circuitry and effective utilization of interconnections. In this paper, a new 4×4 current-mode quaternary Vedic multiplier design is proposed. The multiplier has been simulated using 0.18 µm technology with a power supply of 1 V and a …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 2, 2014 · pp. 37–46 Read article
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Nonlinear Semiconductor Device Modeling using Neural Networks
Abstract: This paper describes the nonlinear semiconductor (transistor) of small and large signal modeling using a single neural network. Multilayer perceptron (MLP) with back-propagation (BP) learning is adopted in this work to model the drain current (ID) and the transconductance (gm) of the transistor. MLP modeling performance in terms of mean square error (MSE) and complexity of the network are illustrated briefly. Artificial neural network (ANN) model outcome for nonlinear function …
Published in Journal of VLSI Design Tools and Technology · Vol. 4, Issue 3, 2014 · pp. 1–6 Read article
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Low Power RF QPSK MODEM Design
Abstract: System-level simulation including design of CMOS circuits for radio frequency QPSK MODEM targeting applications in 2.45 GHz industrial, scientific and medical (ISM) band has been presented in this paper. Based on the QPSK architecture, the MODEM consists of an analog mixer using a voltage multiplier, a 90 °phase shifter, delay circuits, a voltage adder and a filter to detect the information. A code reuse subsystem block consisting of Chebyshev filter …
Published in Journal of VLSI Design Tools and Technology · Vol. 2, Issue 1-2-3, 2012 · pp. 75–86 Read article
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System Level Modeling of ISMB Quadrature Transceiver
Abstract: In this paper, a new ISMB quadrature transceiver system-level design architecture is presented along with its referenced mathematical models and these were verified using state-of-the-art system modeling tools. Unlike a K-TEK’s receiver, it does not suffer from the timing and template matching problems, and it circumvents processing at high frequencies, thereby reducing the on-chip circuit complexity and power consumption. Hilbert transform has been used at the output of the demodulator …
Published in Journal of VLSI Design Tools and Technology · Vol. 2, Issue 1-2-3, 2012 · pp. 108–117 Read article
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Comparative Analysis of CMOS CNFET and Memristor Based Full Adder Circuits and CMOS Memristor Based Multiplexer Circuits
Abstract: Continued developments in microelectronics technology have led to a myriad of new compute-intensive applications at the micro-edge, such as artificial intelligence and signal and image processing. Multiplication is a crucial arithmetic process in such applications. However, large logic complexities typically seen in traditional multipliers generate combinatorial blocks with long chains of cascaded carry addition. As such, energy efficiency has remained a primary design challenge for these applications, when powered by …
Published in Journal of VLSI Design Tools and Technology · Vol. 12, Issue 2, 2022 · pp. 22–33 Read article
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Partial Replacement of Cement by Kota Stone Slurry in Mortar
Abstract: AbstractKota stone is one of the lime stones which is found in Kota, Jhalawar, and Chittor districts of Rajasthan. It is a very fine-grained siliceous calcium carbonate rock of sedimentary nature. During cutting and polishing process, a lot of material remains unused, and this waste may be called as Kota stone cutting and polishing waste. The disposal of Kota Stone Slurry (KSS) from the Kota stone industry is one of …
Published in Recent Trends in Civil Engineering & Technology · Vol. 7, Issue 3, 2017 · pp. 8–13 Read article