Search
190 articles for “VLS”
-
VIKOR Method for Multi Criteria Decision Making in Academic Staff Selection
Abstract: For any academic organization, the selection of qualified personnel is a key success factor. As many factors such as professional ability, communication ability, work experience and so on influence the personnel selection, this becomes a Multi Criteria Decision Making (MCDM) problem. MCDM methods provide a ranking of the available alternatives thereby, decision of critical thinking become easier. A branch of MCDM methods named Vlse Kriterijumska Optimizacija I Kompromisno Resenje in …
Published in Journal of Production Research & Management · Vol. 3, Issue 2, 2013 · pp. 30–35 Read article
-
Performance Analysis of Bootstrapping Techniques to Overcome the Threshold Voltage Drop in NMOS Logic Design
Abstract: Abstract: In this paper, we study the concept of bootstrapping techniques and analyzed its performance in digital CMOS circuits. These bootstrapping circuits are used to increase the gate voltage of transistors so that drain node voltage can be pulled high to overcome the threshold voltage drop problem in NMOS logic design. Also discuss the drawback associated with voltage bootstrapping techniques in NMOS logic design that is sneak path problem between …
Published in Journal of Semiconductor Devices and Circuits · Vol. 6, Issue 1, 2019 · pp. 15–20 Read article
-
Study and Analysis on Multi-gate MOSFET Design
Abstract: AbstractMulti-gate MOSFET is the emerging technology that is used in the area of low-power VLSI design. Multi-gate devices provide much better advantages over conventional MOSFET. As less power dissipation, decrease size, and more operational value could be obtained. Multi-gate MOSFET devices also reduce cost of production. Thus, design of electronics devices based on multi-gate technology is beneficial in today’s requirement. Basic MOSFET due to its reduction in size shows short …
Published in Journal of Semiconductor Devices and Circuits · Vol. 7, Issue 1, 2020 · pp. 1–7 Read article
-
Effect of Various Parameters on Threshold Voltage of Virtually Fabricated Lightly Doped PMOS Device
Abstract: This paper emphasis on the design, fabrication and analysis of 45 nm P type MOSFET device using SILVACO TCAD tool. The analysis was based on variation of various parameters like oxide thickness, threshold implant and halo implant (pockets) to analyze the threshold voltage. The drain versus gate and drain versus gate plots are being plotted using tony-plot. It has been observed that as the thickness of the oxide increases, threshold …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 13–20 Read article
-
Low Power High Speed Eight-Transistor (8T) SRAM Cell with Enhanced Data Stability
Abstract: The demand of static random access memory cell in embedded memories is rapidly increasing. To design SRAM is continuously becoming difficult due to limitation of weaker write margin, degraded data stability and higher leakage power consumption. In order to overcome these limitations, new 8T SRAM has been explored. The simulation results depicts better data stability, low access delay and decreased leakage power consumption. Alternatively, proposed cell with sleep transistor and …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 35–44 Read article
-
Implementation of RSA and CRT-RSA with MIST to Resist Power Analysis Attacks
Abstract: Security has transformed out into a fundamental range of research in space of computer science. With the advancement of side channel attacks, all the private and public key cryptosystems accessible worldwide has been discovered defenceless. Accordingly there has broughtdireness up in planning resisting systems against such unpredictable attacks. Power analysis attacks, which is the most famous side channel attacks has turned out to be a test for the majority of …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 1–12 Read article
-
Performance Analysis of 3T DRAM Using FinFET Based with Leakage Reduction Techniques at 45 nm Technology
Abstract: The proposed area of research is to reduce the power consumption, leakage voltage, leakage current and leakage power of DRAM while maintaining the competitive performance. The Fin FET approach is used in DRAM for high performance. Fin type field effect transistors (Fin FET) are capable substitutes for bulk CMOS at the nano-scale. Fin FET are double gate device. A Fin FET uses an intrinsic body. It greatly suppresses the device-performance …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 28–34 Read article
-
Single Bit Low-Power High-Speed Full Adder
Abstract: This paper presents a high-speed low-power full adder cells that lead to have a reduced power-delay product (PDP). A comparison against other full-adder structure as having low PDP, in terms of speed, power consumption and area of cells is carried out. This paper contains, a hybrid 1-bit full adder design employing both complementary metal-oxide semiconductor (CMOS) and transmission gate logic styles. First implemented was the design for 1 bit then …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 55–60 Read article
-
Low-Offset High Speed CMOS Voltage Comparator using 180 nm Technology
Abstract: A low Off-Set high-speed two-stage dynamic comparator is presented. In this circuit, PMOS transistors are used at the input of the first and second stages of the comparator. At the evaluation phase, the second stage is activated after the first stage with a predetermined delay to achieve a controllable pre-amplifier gain. Also, the first stage is turned off after the delay to reduce overall power consumption. Simulation results in 0.18µm …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 21–27 Read article
-
High Speed and Low Area Energy Efficient FPGA Implementation using RSD based Elliptic Curve Cryptography
Abstract: In this paper we will study high speed energy efficient FPGA implementation using redundant sign digit elliptic curve cryptography. In existing system to design processor with high area and low speed computation process so that we proposed to low area with high speed computation using Elliptical cryptography processor. Here we use redundant signed digit to reduce the overhead due to computations. For modular arithmetic operation for multiplication, we used Karatsuba-Ofman …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 45–50 Read article
-
Carbon Nanotube Transistor Based Novel Ring Oscillator with Minimum Power Consumption at 32 nm Technology Node
Abstract: In this article an analysis of carbon nanotube field effect transistor based ring oscillator is performed. After analysis it was found that carbon nanotube transistor consumes less power in comparison to silicon transistor. CNFET is one possible candidate to substitute silicon-based integrated circuit (IC) technology, as the performance increase of conventional transistors witnessed during the last decades will arrive at its ultimate limits in the near future. Its present progress …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 51–54 Read article
-
Fault Detection Attainment for Embedded Cores based on Software Test Routines
Abstract: The test circuitry is designed in built-in-self-test (BIST) technique involves a system that applies the test signals and observes the corresponding system response. In this technique, the framework is embedded directly into the system hardware. The testing process performs efficiently, fastly and more economically than using an external test setup. Self-testing of embedded processors based on the test routines is an emerging method, since it employs a test resource partitioning …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 1, 2018 · pp. 1–6 Read article
-
Memristor based Material Implication Logic for Implementation of Basic logic Gates and Circuits
Abstract: A physical memristor was realized a few years back by Hewlett Packard labs. Instantly it became the topic of interest for many scientists and researchers. Memristor has joined resistor, capacitor and inductor in the list of basic two-terminal passive circuit elements. Field Programmable Gate Arrays (FPGAs) have become a major choice of technology for the implementation of various digital circuits because they offer various features such as quick time to …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 1, 2018 · pp. 17–22 Read article
-
Comparative Analysis of Combinational Circuit Using Reversible Logic Based Techniques
Abstract: In the last few decades, due to the ever growing demand for portable and small sized devices, integrated circuits require electronic circuit design methods to implement integrated circuits with low power consumption. The ever-growing number of transistors integrated on a chip and the increasing transistor switching speed in recent decades has enabled great performance improvement in computer systems by several orders of magnitude. Adiabatic logic technique is one of the …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 1, 2018 · pp. 30–33 Read article
-
AXI Bridge and DMA/Bridge Subsystem for PCIe
Abstract: We know that the present-day SOC design consists of many intellectual property cores with several communication protocols. To enhance the performance of the whole system, we need to improve the bridging and signal translation between these protocols. In this article, discussion has been carried out on PCIe and AXI protocol from AMBA. PCI Express, because of its various features like high speed, low power consumption, and good protocol efficiency can …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 1, 2018 · pp. 23–29 Read article
-
Characterization of Low Power-Low Jitter Digital PLL
Abstract: The architecture design is being done in transistor level and tool which supports transistor level design. Mentor Graphics Tool is used for transistor level design and its simulation design. There are few tools which support design simulation like HSpice, Spectre and PSpice. Also a foundry support is from Taiwan Semiconductor Manufacturing Corporation (TSMC) (i.e.) technology model files 180 nm from TSMC for simulation. This article presents design for 1.5 GHz …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 2, 2018 · pp. 23–32 Read article
-
Design of Three-Stage Pipelined Floating Point Arithmetic Operators
Abstract: Some embedded systems perform signal processing operations (Fourier transform, filtering) as for example for the recognition voice, high quality audio and control of critical systems (airplane, rocket). This type of operation may require the use of floating numbers. This paper presents the hardware implementation of floating point arithmetic operators for addition, subtraction, multiplication using the IEEE-754 single precision format. Proposed architecture follows two different RTL approach, Melay FSM and multiplexer …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 2, 2018 · pp. 9–22 Read article
-
High Gain Antenna Array (2x1 and 4x1) Design for WLAN Application
Abstract: Micro-strip antennas became very popular in 1970s primarily for space borne applications. Today they are used for government and commercial applications. These antennas consist of a metallic patch on a grounded substrate. The metallic patch can take many different configurations. However, the rectangular and circular patches are most popular because of ease of analysis and fabrication, and their attractive radiation characteristics, especially low cross-polarization radiation. In high performance aircraft, spacecraft, …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 2, 2018 · pp. 1–8 Read article
-
A Review on FPGA Parallel Architecture for Object Detection
Abstract: The main purpose in the case of present paper is to summarize the different parallel architecture techniques implemented on FPGA by which we can fulfil our requirement of object detection in image processing system. In image processing, it is difficult to find high precision and real time performance even in most powerful CPU. The various parallel architecture techniques can help in to give better performance and achieve high precision. This …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 2, 2018 · pp. 42–48 Read article
-
Comparative Analysis of Different SRAM Cells Architecture at 70 nm
Abstract: There are severe constraints which affect the real time operation of SRAM cells. With increasing demand of device scaling, the performance parameters of SRAM cells are affected. Our main purpose is to maintain performance of memory cells in real time operation. Here, we considered three basic parameters stability, leakage current and delay for compression of various SRAM cell architectures. In this paper, we considered conventional 6T, asymmetric 7T, asymmetric 8T …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 2, 2018 · pp. 33–41 Read article