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70 articles for “Adders”
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Low-Complexity VLSI Hardware Design for DWPT
Abstract: AbstractThis paper presents a low-complex discrete wavelet packet transform (DWPT) architecture design for power constrained and cost sensitive healthcare applications. The multiplier-adder unit of the proposed multiplier-based designs of DWPT is replaced by the shift-add unit to reduce the area complexity of parallel structure. The proposed low-complexity multiplier-less design could be used an alternative to the existing multiplier-based design for hardware efficient realization of multi-level DWPT.Keywords: DWPT, Hardware complexity, VLSI, …
Published in Journal of Microelectronics and Solid State Devices · Vol. 4, Issue 3, 2017 · pp. 28–32 Read article
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Efficient ADP Scheme for DWT Computation
Abstract: AbstractIn this paper, the lifting and flipping scheme for discrete wavelet transform (DWT) computation and proposed an area delay efficient lifting based DWT architecture. In this computation huge number of multipliers and adders are saved when lifting based 2-D DWT architecture implemented. The derived full-parallel lifting-based 1-level 2-D DWT structure involves half number of less multiplier than the flipping-based 2-D DWT structure. Compared with the existing lifting-based structure, the proposed …
Published in Journal of Microelectronics and Solid State Devices · Vol. 5, Issue 3, 2018 · pp. 22–26 Read article
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High Speed and Low Area Energy Efficient FPGA Implementation using RSD based Elliptic Curve Cryptography
Abstract: In this paper we will study high speed energy efficient FPGA implementation using redundant sign digit elliptic curve cryptography. In existing system to design processor with high area and low speed computation process so that we proposed to low area with high speed computation using Elliptical cryptography processor. Here we use redundant signed digit to reduce the overhead due to computations. For modular arithmetic operation for multiplication, we used Karatsuba-Ofman …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 3, 2017 · pp. 45–50 Read article
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Memristor based Material Implication Logic for Implementation of Basic logic Gates and Circuits
Abstract: A physical memristor was realized a few years back by Hewlett Packard labs. Instantly it became the topic of interest for many scientists and researchers. Memristor has joined resistor, capacitor and inductor in the list of basic two-terminal passive circuit elements. Field Programmable Gate Arrays (FPGAs) have become a major choice of technology for the implementation of various digital circuits because they offer various features such as quick time to …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 1, 2018 · pp. 17–22 Read article
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Area and Power Improvement with New Initial Ordering Method Combined with Sift Algorithm for BDD Mapped Circuits
Abstract: Digital circuits are the important elements in almost every electronic design. As the size of electronic ICs are shrinking rapidly, the minimization of the circuit elements and power consumption became more focused area of VLSI research. In this paper, we have introduced a new method for reduction of area and power of binary decision diagram mapped circuits. Binary decision diagrams are used to represent digital functions in VLSI CAD. It …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 2, 2018 · pp. 67–71 Read article
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Design and Analysis of MAC Unit Using Single Precision Floating Point Vedic Multiplier
Abstract: Multiplication and accumulation are the basic operations which are important in several microprocessors and digital signal processing (DSP) applications to execute dedicated algorithms. Developing high speed MAC is essential for real time DSP application. The MAC unit determines the speed of the overall system and it lies in the critical path. As the demand for high speed design is continuously increasing, the studies related to the field of multipliers and …
Published in Journal of VLSI Design Tools and Technology · Vol. 8, Issue 3, 2018 · pp. 28–35 Read article
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Low Power RF QPSK MODEM Design
Abstract: System-level simulation including design of CMOS circuits for radio frequency QPSK MODEM targeting applications in 2.45 GHz industrial, scientific and medical (ISM) band has been presented in this paper. Based on the QPSK architecture, the MODEM consists of an analog mixer using a voltage multiplier, a 90 °phase shifter, delay circuits, a voltage adder and a filter to detect the information. A code reuse subsystem block consisting of Chebyshev filter …
Published in Journal of VLSI Design Tools and Technology · Vol. 2, Issue 1-2-3, 2012 · pp. 75–86 Read article
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High Speed and Low Area Energy Efficient FPGA Implementation using RSD based Elliptic Curve Cryptography
Abstract: In this paper we will study high speed energy efficient FPGA implementation using redundant sign digit elliptic curve cryptography. In existing system to design processor with high area and low speed computation process so that we proposed to low area with high speed computation using Elliptical cryptography processor. Here we use redundant signed digit to reduce the overhead due to computations. For modular arithmetic operation for multiplication, we used Karatsuba-Ofman …
Published in Journal of VLSI Design Tools and Technology · Vol. 7, Issue 2, 2017 · pp. 45–50 Read article
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Design of Decoder Using Domino Logic Circuit for VLSI
Abstract: Dissipation of power from a circuit is the major issue in the design of any VLSI circuit, which decreases the life span of a device/system. NMOS and PMOS circuits are very slow while switching the state from low to high. The speed of the circuit can be increased by decreasing resistance. This process in turn increases the static power dissipation. So, because of these disadvantages, CMOS circuits are used in …
Published in Journal of VLSI Design Tools and Technology · Vol. 11, Issue 3, 2021 · pp. 42–54 Read article
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Design and Simulation of FIR Filter using VHDL
Abstract: Digital Signal Processing (DSP) has gained great popularity in the recent years. DSP is used in the field of communication, medicine and entertainment. Earlier the digital signals use is expensive in the communication devices. DSP makes use of the digital filters in the communication equipment. The basic building block of the digital filter-adder, coefficient multipliers and delays. Digital filter can be implemented efficiently by selecting an efficient representation for filter …
Published in Journal of Communication Engineering & Systems · Vol. 8, Issue 1, 2018 · pp. 19–28 Read article