Search
283 articles for “Semiconducting”
-
Denoising of XRD Signals
Abstract: In this paper, different types of signal are discussed. Also various methods of signal transformation are studied. A detailed study of different wavelet families is done. By using different signal transformation methods, XRD signals are denoised here. Original and denoised signal for different wavelet families are plotted on the basis of their best threshold values. Keywords: Signals, denoising, wavelets, fourier transform, threshold value Cite this ArticleJyoti Yadav. Denoising of XRD …
Published in Journal of Semiconductor Devices and Circuits · Vol. 4, Issue 3, 2017 · pp. 1–10 Read article
-
Novel Characteristics of GaN based Nanoelectronic Double-Heterojunction HEMTs to Establish a Solid-State-Electronics Laboratory
Abstract: The drain characteristics are investigated with respect to electrical variables (drain voltage, gate voltage) and structural parameters of high electron mobility transistors (HEMTs). Total 10526 individual simulation-outputs are reported in this work. The maximum drain current of 553 mA is achieved by the simulated structures of double-heterojunction HEMTs using the SILVACO-ATLAS software tool. The drain current is higher at shorter gate length. The drain current is higher at larger aluminium …
Published in Journal of Semiconductor Devices and Circuits · Vol. 4, Issue 3, 2017 · pp. 11–20 Read article
-
Power Converters for Renewable Energy Sources
Abstract: There has been a paradigm shift in the energy requirements of our world, from fossils to renewable energy this change will evolve further. This demands technological efficiency in terms of production, distribution and use of energy along with strengthening incentives to save energy at the end user. Energy conversion systems will play a vital role in this smooth transition. We can pave the way for renewable energies using highly efficient …
Published in Journal of Semiconductor Devices and Circuits · Vol. 4, Issue 3, 2017 · pp. 30–34 Read article
-
Reduction of Short Channel Effects with the Variation of Poly Doping and Source/Drain Doping
Abstract: In this paper, the concentration of poly-silicon doping and source/drain doping has been varied to obtain the approximation the OFF state leakage current for N channel MOSFET. A lightly doped NMOS has been designed using 45 nm technology in ATHENA and simulated in ATLAS of SILVACO TCAD tool. After simulation results, it has been observed that as the poly-silicon doping and source drain doping concentrations are decreased, there is a …
Published in Journal of Semiconductor Devices and Circuits · Vol. 4, Issue 3, 2017 · pp. 35–42 Read article
-
Stochastic Differential Equation Noise Analysis of Common-Gate Amplifier with Capacitive Load
Abstract: In this paper, common-gate amplifier with capacitive load is analysed to observe the effect of noise on the circuit. We used stochastic differential equations to analyse the effect of extrinsic noise. We adopted time domain approach and used SDE to obtain autocorrelation function for the output voltage. We determined mean and variance of the output noise. This analysis leads to obtain the circuit with better noise performance. Keywords: Common-gate amplifier, …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 1, 2018 · pp. 1–4 Read article
-
Schmitt-Trigger Based 12T SRAM Cell with Enhanced Stability
Abstract: In this work, we present a single-ended Schmitt-trigger (ST) based 12T static random access memory (SRAM) cell. The proposed cell employs cross-point data aware write structure, and thus supports bit interleaving architecture to mitigate soft errors. The proposed cell does not suffer from read disturbance as bit line is completely isolated from bit storage node. Simulation is done on 180 nm CMOS technology on Cadence. Read static noise margin (RSNM) …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 1, 2018 · pp. 5–10 Read article
-
MOS Capacitor: A Processing Tool
Abstract: In this modern world of technology, life without electronics is unimaginable. We are now living in the age of electronics. It is hard to find an electrical item in your home that does not have electronics part in it. The electronic devices give better efficiency and reliability in terms of power loss, speed and cost; the fundamental component of each Integrated Circuit (IC) chip, namely the MOSFET (metal oxide semiconductor …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 1, 2018 · pp. 27–32 Read article
-
Signal Integrity Analysis of Single Walled Carbon Nano Tube based Interconnects at 32 nm Technology Node
Abstract: The rising demands for ultra-high-speed processors and portable devices have made the transistor and interconnect scaling a challenging issue in present days. In this work, the impedance parameter of copper and CNT based interconnects are calculated at 32 nm technology node for different lengths. The performances of CNT based interconnects are analyzed and compared with Cu based interconnects in terms of crosstalk. The conventional copper interconnects are not able to …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 1, 2018 · pp. 33–42 Read article
-
An Efficient RNS Based Sparse Kogge Stone Parallel Pre-fix Adder with Filter
Abstract: AbstractLow power very large-scale integration (VLSI) circuits are important for designing of high performance and portable devices. Along with that the high speed, small area and low cost are also the main considerations of VLSI circuits. The importance of low power is increasing day by day because of changing trend, packaging and cooling cost, portable system and reliability. This paper presents the design of Digital FIR filter using reverse converter …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 1, 2018 · pp. 43–51 Read article
-
Implementation and Analysis of Full Adder using low Power Adiabatic Techniques
Abstract: AbstractIn this study, authors have discussed, designed and compared the low power adiabatic logic energy efficient recovery logic (ECRL) and positive feedback of adiabatic logic (PFAL) with conventional Complementary Mosfet (CMOS) logic. A one-bit full adder using these design techniques are implemented and results are compared like power, delay, transistor count and power delay product. Tanner tool v13 is used for designing of schematic and simulation. From the result, it …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 2, 2018 · pp. 1–8 Read article
-
Closed Loop Control of Interleaved Buck Converter with Extremely Low Output Current Ripple
Abstract: AbstractIn this paper, the analysis and modeling of interleaved buck converter with PI controller is discussed. Converters are controlled by two active switches, which have the same switching frequency but 180° out of phase. The loss associated with the power device is half of the input voltage and the duty cycle is below 50%. By paralleling the converters, the input current can be shared among the inductors so that high …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 2, 2018 · pp. 9–18 Read article
-
Different Compressor Adders
Abstract: AbstractMultipliers are one of the main blocks which decide the circuit performance as well as computation speed. In multiplication, addition of partial products contributes most to the circuit delay, power, and area. In this project, compressor adders are used to reduce this delay. Hence, compressors are a major part of the multiplier circuit that decides the overall speed of the system. For high-speed processing and higher systems, a huge number …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 2, 2018 · pp. 19–26 Read article
-
An Optimized 32 bit Carry Select Adder Using Modified BEC
Abstract: AbstractAdders play a major role in addition of numbers, multiplications and other advanced processors’ design. Among the conventional adder structures, carry select adder is known to be fastest adder. This adder circuit is used for the design of high speed processors. The CSLA adder architecture is such that it is of less power dissipation, area efficient and high speed. CSLA circuit for 8, 16, 32 bits is designed without multiplexer …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 2, 2018 · pp. 27–32 Read article
-
Numerical Simulation and Modeling of Self Heating in SOI MOSFET
Abstract: Abstract As the device size has been reduced the temperature increment of high-performance very large scale integrations (VLSIs) becomes a major issue. The self-heating effect and non-uniform power distribution in VLSIs, affect the performance of device. In this paper numerical simulation of self heating in SOI MOSFET has been performed. Poisson's equation, continuity equation, energy balance equation and heat flow equations have been solved self consistently using finite element method …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 3, 2018 · pp. 18–23 Read article
-
Electrical Characteristics of AlGaN/GaN/AlGaN HEMTs
Abstract: AbstractA maximum drain current of 556 mA is achieved by the simulated structures of double-heterojunction AlGaN/GaN/AlGaN high electron mobility transistors (HEMTs) using the SILVACO-ATLAS software tool in this work. The drain current is observed as higher at shorter gate length. The drain current is found as higher at larger aluminium mole fraction. Also, the drain current is found as higher at larger thickness of AlGaN barrier layer. The drain current …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 3, 2018 · pp. 7–17 Read article
-
GaN-based Double Gate MOSFET (DG-MOSFET)
Abstract: AbstractGaN is auspicious for high-power, high-temperature devices because of its large bandgap, and high saturation velocity compared with Si. Gallium nitride (GaN) based devices are expected to play an important role to develop the next-generation devices. The performance of GaN-based double gate (DG) MOSFETs have been explored with gate length (Lg) 10.6 nm. The ON-current (ION) and OFF-current (IOFF) are found to be 8.11´10–3 and 6.38605´10–9A/µm respectively, respectively with an …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 3, 2018 · pp. 24–28 Read article
-
An Efficient Tree Structure 32-Bit Brent-Kung Adder for Reducing Time Delay and Memory Utilization
Abstract: AbstractBrent-Kung adder is such of the parallel prefix adders secondhand for speeding of the operation. Parallel prefix adders are the fast adders and dig the arithmetic operations at the expeditious rate. Most Industries are like TMSC, Texas, are used by parallel prefix adders seeing of their advantages compared to a variance adder. Parallel prefix adders are faster and area efficient. Parallel prefix adder is a campaign for increasing the speed …
Published in Journal of Semiconductor Devices and Circuits · Vol. 5, Issue 3, 2018 · pp. 29–35 Read article
-
Optimization of FLOTOX in EEPROM Design
Abstract: Abstract: Electrically Erasable Programmable Read-Only Memory (EEPROM) is a non-volatile memory (NVM) which is used in computers, integrated into microcontrollers for smart cards and remote keyless system, and other electronic devices to store relatively small amounts of data but allowing individual bytes to be erased and reprogrammed. Here the sizes of the floating gate & control gate have been altered to find the impacts for programming events and determine the …
Published in Journal of Semiconductor Devices and Circuits · Vol. 6, Issue 1, 2019 · pp. 1–9 Read article
-
Design and Analysis of Inverters using Double Gate MOSFET
Abstract: AbstractThe double gate MOSFET is a form of MOSFET where two gates are fabricated along the length of the channel, one after another. There are several applications of double gate MOSFETs. It is possible to design logic gates using double gate MOSFETs. It is one of the digital applications of it. This paper interprets the design and analysis of different types of inverters using DG-MOSFET. The advantages of using DG-MOSFET …
Published in Journal of Semiconductor Devices and Circuits · Vol. 4, Issue 1, 2017 · pp. 1–7 Read article
-
Simulation Studies on the Drain Characteristics of Microelectronic AlGaN/GaN HEMTs Corresponding to the 30 nm of AlGaN Nano-Layer
Abstract: AbstractIn this work, the simulation studies are performed on high electron mobility transistor (HEMT) structures using the SILVACO-ATLAS software tool. The drain characteristics of HEMT structures is investigated with respect to the Aluminium mole fraction, drain voltage, gate voltage, and gate length at 30 nm thickness of AlGaN nano-layer. The simulation studies on the effect of gate length to control the drain characteristics are a novelty of this work. The …
Published in Journal of Semiconductor Devices and Circuits · Vol. 4, Issue 1, 2017 · pp. 8–16 Read article